W241024A
128K
×
8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W241024A is a high speed, low power CMOS static RAM organized as 131072
×
8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
•
•
High speed access time: 12/15/20 nS (max.)
Low power consumption:
−
Active: 600 mW (typ.)
Single +5V power supply
Fully static operation
•
•
•
All inputs and outputs directly TTL compatible
Three-state outputs
Available packages: 32-pin 300 mil SOJ, 400
mil SOJ, skinny DIP and standard type one
TSOP (8 mm
×
20 mm), and small type one
TSOP (8 mm
×
13.4 mm)
•
•
PIN CONFIGURATIONS
BLOCK DIAGRAM
V
DD
V
SS
A0
.
.
A16
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 1
I/O 2
I/O 3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
A15
CS2
WE
A13
A8
A9
A11
OE
A1 0
CS1
I/O 8
I/O 7
I/O 6
I/O 5
I/O 4
DECODER
CORE
ARRAY
CS2
CS1
OE
WE
CONTROL
DATA I/O
I/O1
.
.
I/O8
PIN DESCRIPTION
SYMBOL
A0−A16
I/O1−I/O8
CS1, CS2
WE
OE
V
DD
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
A11
A9
A8
A13
WE
CS2
A15
V
DD
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-pin
TSOP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
DQ3
DQ2
DQ1
A0
A1
A2
A3
-1-
Publication Release Date: July 1998
Revision A9
WINBOND [ WINBOND ]
