W24257
BONDING PAD DIAGRAM
6
A4
7
A3
5
A5
4
A6
3
2
1
30
29
28
27
26
25
24
A7 A12 A14 V
DD
V
DD
WEB A13
A8 A9 A11
AC5394
23
OEB
Y
X
8
A2
9
A1
10
11
12
13
14
15
16
17
18
19
20
21
22
A10
A0 I/O0 I/O1 I/O2 V
SS
V
SS
I/O3 I/O4 I/O5 I/O6 I/O7 CSB
PAD NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
X
-232.25
-351.70
-471.15
-590.60
-710.05
-829.50
-992.79
-992.79
-857.86
-738.41
-594.84
-451.06
-310.67
-171.78
24.45
151.80
298.07
443.28
588.20
732.84
871.11
992.75
992.75
810.09
690.64
571.19
451.74
332.29
120.25
-93.23
Y
1445.22
1445.22
1445.22
1445.22
1445.22
1445.22
1362.24
-1306.11
-1452.79
-1452.79
-1414.13
-1414.13
-1414.13
-1405.28
-1405.28
-1414.13
-1414.13
-1414.13
-1414.13
-1414.13
-1452.79
-1312.15
1373.67
1445.22
1445.22
1445.22
1445.22
1445.22
1444.65
1444.65
Note: For bare chip form (C.O.B.) applications, the substrate must be connected to V
DD
or left floating in the PCB layout.
-8-
Publication Release Date: January 2001
Revision A16
WINBOND [ WINBOND ]
