Preliminary W27C020
256K
×
8 ELECTRICALLY ERASABLE EPROM
GENERAL DESCRIPTION
The W27C020 is a high speed, low power Electrically Erasable and Programmable Read Only
Memory organized as 262144
×
8 bits that operates on a single 5 volt power supply. The W27C020
provides an electrical chip erase function.
FEATURES
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High speed access time:
70/90/120 nS (max.)
Read operating current: 30 mA (max.)
Erase/Programming operating current:
30 mA (max.)
Standby current: 1 mA (max.)
Single 5V power supply
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+14V erase/+12V programming voltage
Fully static operation
All inputs and outputs directly TTL/CMOS
compatible
Three-state outputs
Available packages: 32-pin 600 mil DIP and
PLCC
PIN CONFIGURATIONS
Vpp
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
25
24
23
22
21
20
19
18
17
Vcc
PGM
A17
A14
A13
A8
A9
A11
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
BLOCK DIAGRAM
PGM
CE
OE
CONTROL
OUTPUT
BUFFER
Q0
.
Q7
A0
7 32-pin DIP 26
.
A17
V
CC
GND
V
PP
CORE
DECODER
ARRAY
/
A A A V V P A
1 1 1 p c G 1
2 5 6 p c M 7
4 3 2 1 3 3 3
2 1 0 29
5
28
6
7
27
26
8
32-pin PLCC
25
9
24
10
23
11
12 1 1 1 1 1 1 2 22
13 4 5 6 7 8 9 0 21
Q Q G Q Q Q Q
1 2 N 3 4 5 6
D
PIN DESCRIPTION
SYMBOL
A0−A17
A14
A13
A8
A9
A11
OE
A10
CE
Q7
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable
Program Enable
Program/Erase Supply Voltage
Power Supply
Ground
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q0−Q7
CE
OE
PGM
V
PP
V
CC
GND
-1-
Publication Release Date: September 1998
Revision A1
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