W27E512
FUNCTIONAL DESCRIPTION
Read Mode
Like conventional UVEPROMs, the W27E512 has two control functions, both of which produce data
at the outputs. CE is for power control and chip select. OE/V
PP
controls the output buffer to gate data
to the output pins. When addresses are stable, the address access time (T
ACC
) is equal to the delay
from CE to output (T
CE
), and data are available at the outputs T
OE
after the falling edge of OE/V
PP
,
if T
ACC
and T
CE
timings are met.
Erase Mode
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs,
which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half
an hour), the W27E512 uses electrical erasure. Generally, the chip can be erased within 100 mS by
using an EPROM writer with a special erase algorithm.
Erase mode is entered when OE/V
PP
is raised to V
PE
(14V), V
CC
= V
CE
(5V), A9 = V
PE
(14V), A0
low, and all other address pins low and data input pins high. Pulsing CE low starts the erase
operation.
Erase Verify Mode
After an erase operation, all of the bytes in the chip must be verified to check whether they have been
successfully erased to "1" or not. The erase verify mode ensures a substantial erase margin if V
CC
=
V
CE
(3.75V), CE low, and OE/V
PP
low.
Program Mode
Programming is performed exactly as it is in conventional UVEPROMs, and programming is the only
way to change cell data from "1" to "0." The program mode is entered when
OE
/V
PP
is raised to V
PP
(12V), V
CC
= V
CP
(5V), the address pins equal the desired addresses, and the input pins equal the
desired inputs. Pulsing CE low starts the programming operation.
Program Verify Mode
All of the bytes in the chip must be verified to check whether they have been successfully
programmed with the desired data or not. Hence, after each byte is programmed, a program verify
operation should be performed. The program verify mode automatically ensures a substantial
program margin. This mode will be entered after the program operation if OE/V
PP
low and CE low.
Erase/Program Inhibit
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different
data. When
CE
high, erasing or programming of non-target chips is inhibited, so that except for the
CE and OE/V
PP
pins, the W27E512 may have common inputs.
-2-
WINBOND [ WINBOND ]
