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W79E804ADG 参数 Datasheet PDF下载

W79E804ADG图片预览
型号: W79E804ADG
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-BIT MICROCONTROLLER]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 115 页 / 1566 K
品牌: WINBOND [ WINBOND ]
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W79E804A/803A/802A
12.2 Priority Level Structure
The W79E804 series uses a four priority level interrupt structure (highest, high, low and lowest) and
supports up to 12 interrupt sources. The interrupt sources can be individually set to either high or low
levels. Naturally, a higher priority interrupt cannot be interrupted by a lower priority interrupt. However
there exists a pre-defined hierarchy amongst the interrupts themselves. This hierarchy comes into play
when the interrupt controller has to resolve simultaneous requests having the same priority level. This
hierarchy is defined as table below. This allows great flexibility in controlling and handling many
interrupt sources.
PRIORITY BITS
IPXH
IPX
INTERRUPT PRIORITY LEVEL
0
0
1
1
0
1
0
1
Level 0 (lowest priority)
Level 1
Level 2
Level 3 (highest priority)
Table 12-2: Four-level interrupt priority
Each interrupt source can be individually programmed to one of four priority levels by setting or
clearing bits in the IP0, IP0H, IP1, and IP1H registers. An interrupt service routine in progress can be
interrupted by a higher priority interrupt, but not by another interrupt of the same or lower priority. The
highest priority interrupt service cannot be interrupted by any other interrupt source. So, if two
requests of different priority levels are received simultaneously, the request of higher priority level is
serviced.
If requests of the same priority level are received simultaneously, an internal polling sequence
determines which request is serviced. This is called the arbitration ranking. Note that the arbitration
ranking is only used to resolve simultaneous requests of the same priority level.
As below Table summarizes the interrupt sources, flag bits, vector addresses, enable bits, priority bits,
arbitration ranking, and whether each interrupt may wake up the CPU from Power Down mode.
SOURCE
FLAG
VECTOR
ADDRESS
INTERRUPT
INTERRUPT
ARBITRATION POWER
FLAG
DOWN
ENABLE
PRIORITY CLEARED BY
RANKING
WAKEUP
BITS
External
Interrupt 0
Brownout
Detect
Watchdog
Timer
IE0
0003H
EX0
(IE0.0)
EBO (IE.5)
EWDI
(EIE.4)
IP0H.0,
IP0.0
IP0H.5,
IP0.5
IP1H.4,
IP1.4
Hardware,
Follow the
inverse of
pin
Software
Software
1(highest)
Yes
BOF
WDIF
002BH
0053H
2
3
Yes
Yes
(1)
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