Preliminary W83194R-37/-58
100 MHZ AGP CLOCK FOR VIA CHIPSET
1.0 GENERAL DESCRIPTION
The W83194R-37/-58 is a Clock Synthesizer for VIA chipset. W83194R-37 provides all clocks
required for high-speed RISC or CISC microprocessor such as Intel PentiumPro, AMD or Cyrix. Eight
different frequencies of CPU, W83194R-58 provides all clocks required for high-speed RISC or CISC
microprocessor such as Intel PentiumII and also provides 16 different frequencies of CPU clocks by
software setting (additional register0 bit2). AGP and PCI clocks are externally selectable with smooth
transitions. The W83194R-37/-58 provides AGP clocks especially for clone chipset, and makes
SDRAM in synchronous frequency with CPU or AGP clocks.
The W83194R-37/-58 provides I
2
C serial bus interface to program the registers to enable or disable
each clock outputs and choose the 0.25%, 0.5% or 0.5%,1.5% center type spread spectrum to reduce
EMI.
The W83194R-37/-58 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1V /nS slew rate into 30 pF
loads. CPU CLOCK outputs typically provide better than 1V /nS slew rate into 20 pF loads as
maintaining 50
±5%
duty cycle. The fixed frequency outputs as REF, 24 MHz, and 48 MHz provide
better than 0.5V /nS slew rate.
2.0 FEATURES
•
Supports Pentium™, Pentium™ Pro, Pentium™ II, AMD and Cyrix CPUs with I C.
•
4 CPU clocks
•
12 SDRAM clocks for 3 DIMs
•
Two AGP clocks
•
6 PCI synchronous clocks.
•
Optional single or mixed supply:
2
(V
DD
= V
DD
q3 = V
DD
q2 = V
DD
q2b = 3.3V) or (V
DD
= V
DD
q3 = V
DD
q2 = 3.3V, V
DD
q2b = 2.5V)
•
Skew form CPU to PCI clock -1 to 4 nS, center 2.6 nS, AGP to CPU sync. skew 0 nS (250 pS)
•
SDRAM frequency synchronous to CPU or AGP clocks
•
Smooth frequency switch with selections from 60 to 100 MHz CPU (-37) and 66 to 150 MHz (-58)
•
I C 2-Wire serial interface and I C read back
•
±0.5%
or
±1.5%
(-37) and 0.25%, 0.5% (-58) center type spread spectrum to reduce EMI
•
Programmable registers to enable/stop each output and select modes (mode as Tri-state or Normal)
•
MODE pin for power Management
•
48 MHz for USB
•
24 MHz for super I/O
•
Packaged in 48-pin SSOP
2
2
-1-
Publication Release Date: April 1999
Revision A1
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