W83310DS/DG
PRELIMINARY
- Dual Layout of W83310DS/DG and W83310S-R2 for DDR V
TT
Application
2.5VREF
R1
10K
VRAM
C1
1000u
1
2
3
DDRVTT
4
U1
VIN
GND
VREF1
VOUT
VREF2
ENABLE
VCTRL
BOOTSEL
8
7
6
5
C5
100U
C2
1u
3VDUAL
R2
10K
W83310DS/DG
C3
1u
C4
1500u
W83310S-R2, W83310DS/DG
DUAL LAYOUT
6. Internal Block Diagram
V
CTRL
V
IN
ENABLE
V
REF2
Control
Logic
V
REF1
Control
Logic
Circuit
V
OUT
BOOT_SEL
GND
All Trademark and Brand name belong to their respective owners.
4
Publication Release Date: 2005/May
Revision 0.9