W83627DHG
8.85 SMI# Mask Register 4 - Index 51h (Bank 4)
Register Location:
Power on Default Value:
Attribute:
Size:
51h
13h
Read/Write
8 bits
7
6
5
4
3
2
1
0
3VSB
VBAT
Reserved
Reserved
TAR3
Reserved
Reserved
Reserved
Bit 7-5: Reserved.
Bit 4: A one disables the corresponding interrupt status bit for the
SMI
interrupt. (See Interrupt Status
Register 3 - Index 50h (Bank
4))
Bit 3-2: Reserved.
Bit 1-0: A one disables the corresponding interrupt status bit for the
SMI
interrupt. (See Interrupt
Status Register 3 - Index 50h (Bank
4))
8.86 Reserved Register - Index 52h (Bank 4)
8.87 BEEP Control Register 3 - Index 53h (Bank 4)
Register Location:
Power on Default Value:
Attribute:
Size:
7
53h
00h
Read/Write
8 bits
6
5
4
3
2
1
0
EN_3VSB_BP
EN_VBAT_BP
Reserved
Reserved
Reserved
EN_USER_BP
Reserved
Reserved
Bit 7-6: Reserved.
Bit 5: User-defined BEEP output function.
0: Make BEEP inactive. (Default)
1: Make BEEP active.
Bit 4-2: Reserved.
-102-
Publication Release Date: Aug, 22, 2007
Version 1.4
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