Preliminary W91312N
PIN DESCRIPTION
SYMBOL
Column-
Row Inputs
PIN
1−4
&
15−18
7, 8
9
I/O
I
FUNCTION
The keyboard input may be from either the standard 4
×
4
keyboard or an inexpensive single contact (form A) keyboard.
Electronic input from a
µC
can also be used. A valid key entry is
defined as a single row being connected to a single column.
A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
The T/P MUTE is a conventional CMOS N-channel open drain
output. The output transistor is switched on during pulse and tone
mode dialing sequence and flash break. Otherwise, it is switched
off.
Pulling mode pin to V
SS
places the dialer in tone mode. Pulling
mode pin to V
DD
places the dialer in pulse mode (10 ppS). Leaving
mode pin floating places the dialer in pulse mode (20 ppS).
Hook switch input. HKS = 1: On-hook state. Chip in sleeping
mode, no operation.
HKS
= 0: Off-hook state. Chip enabled for
normal operation. The HKS pin is pulled to V
DD
by an internal
resistor.
N-channel open drain dialing pulse output (Figure 1). Flash key will
cause DP to go active in both pulse mode and tone mode.
In pulse mode, remains in low state at all times. In tone mode,
outputs a dual or single tone. Detailed timing diagram for tone
mode is shown in Figure 2(a, b).
OUTPUT FREQUENCY
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
XT,
XT
T/P MUTE
I, O
O
MODE
13
I
HKS
10
I
DP
11
12
O
O
DTMF
V
DD
, V
SS
B/M
14, 6
5
I
I
Power input pins.
The break make ratio is 60:40 if B/M = 1 and is 66.6:33.3 if B/M =
0. This pin has no function in DTMF mode.
-2-
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