WM8144-10
Production Data
October 1997 Rev. 3.0
Integrated 10-bit Data Acquisition system for
Imaging Applications
Description
WM8144-10 integrates the analogue signal conditioning
required by CCD sensors with a 10-bit ADC and optional
pixel-by-pixel image compensation. WM8144-10 requires
minimal external circuitry and provides a cost effective
sensor-to-digital domain system solution.
Each analogue conditioning channel provides reset level
clamp, CDS, fine offset level shifting and gain
amplification. The three channels are multiplexed into the
ADC. Output from the ADC can either be direct or passed
through a digital post-processing function. The post-
processing provides compensation for variations in offset
and shading on a pixel-by-pixel basis.
The flexible output architecture allows ten-bit data to be
accessed either on a ten-bit bus or via a time-multiplexed
eight-bit bus. The WM8144-10 can be configured for pixel-
by-pixel or line-by-line multiplexing operation. Reset level
clamp and/or CDS features can be optionally bypassed.
Device configuration is either by a simple serial or eight-
bit parallel interface.
Features
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Reset level clamp
Correlated Double Sampling (CDS)
Fine offset level shifting
Programmable Gain Amplification
10-Bit ADC with maximum 6 MSPS
Digital post-processing for pixel-by-pixel
image compensation
Simple clocking scheme
Control by serial or parallel interface
Time-multiplexed eight-bit data output mode
48 pin TQFP package
Pin compatible with WM8144-12
Applications
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Document scanners
CCD sensor interfaces
Contact image sensor (CIS) interfaces
Block Diagram
V
RLC
V
RU
V
RT
V
RB
V
RL
V
MID
VSMP
MCLK
RLC
A
VDD
A
GND
D
VDD1
D
VDD2
D
GND
MUX
CC[2:0]
V
MID
CL
RS
VS
TIMING CONTROL
DV
RINP
S/H
CDS
S/H
PGA
5-BIT REG
OFFSET
WM8144-10
8-BIT + SIGN
DAC
V
MID
EXTERNAL
DATA STORE
INTERFACE
CDATA(7:0)
ORNG
GINP
S/H
CDS
S/H
PGA
5-BIT REG
OFFSET
M
U
X
8-BIT + SIGN
DAC
10 BIT
ADC
IMAGE
COMPENSATION
PROCESSING
10/8
MUX
OEB
OP[9:0]
V
MID
OFFSET
BINP
S/H
CDS
S/H
PGA
5-BIT REG
PNS
CONFIGURABLE
SERIAL/PARALLEL
CONTROL INTERFACE
V
MID
SDI / DNA
SCK / RNW
SEN / STB
NRESET
8-BIT + SIGN
DAC
Production Data
data sheets contain fi-
nal specifications current on publication
date. Supply of products conforms to
Wolfson Microelectronics standard terms
and conditions
Wolfson Microelectronics
Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK
© 1997 Wolfson Microelectronics
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
email: admin@wolfson.co.uk
www: http://www.wolfson.co.uk
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
