Production Data
WM8321
3
PIN DESCRIPTION
Notes:
1. Pins are sorted by functional groups.
2. The power domain associated with each pin is noted; VPMIC is the domain powered by LDO12 for the ‘always-on’
functions internal to the WM8321.
3. Note that an external level-shifter may be required when interfacing between different power domains.
PIN
NAME
TYPE
POWER
DOMAIN
DESCRIPTION
Clocking and Real Time Clock
Crystal Drive Output
Y12
Y11
W11
XTO
XTI
Analogue Output
Analogue Input
Supply
VPMIC
Crystal Drive Input or 32.768kHz CMOS Clock Input
Crystal Oscillator Ground
XOSCGND
CMOS Clock Output
H1
CLKOUT
Digital Output
DBVDD
Configurable Open Drain / CMOS mode. (External
4.7kΩ pull-up recommended in Open Drain mode.)
General Purpose Input / Output and Auxiliary ADC
GPIO Pin 1
D3
F2
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Selectable pull-up/pull-down.
GPIO Pin 2
DBVDD or
VPMIC
Selectable pull-up/pull-down.
GPIO Pin 3
F3
Selectable pull-up/pull-down.
GPIO Pin 4
W4
Y4
W5
H2
H3
K3
Y5
Y6
W6
Selectable pull-up/pull-down.
GPIO Pin 5
DBVDD or
PVDD
Selectable pull-up/pull-down.
GPIO Pin 6
Selectable pull-up/pull-down.
GPIO Pin 7
Selectable pull-up/pull-down.
GPIO Pin 8
DBVDD or
VPMIC
Selectable pull-up/pull-down.
GPIO Pin 9
Selectable pull-up/pull-down.
GPIO Pin 10 / Auxiliary ADC input
Selectable GPIO pull-up/pull-down.
GPIO Pin 11 / Auxiliary ADC input
Selectable GPIO pull-up/pull-down.
GPIO Pin 12 / Auxiliary ADC input
Selectable GPIO pull-up/pull-down.
DBVDD or
PVDD
PD, February 2012, Rev 4.0
9
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