Production Data
WM8711 / WM8711L
ELECTRICAL CHARACTERISTICS – WM8711
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T
A
= +25
o
C, Slave Mode, fs = 48kHz, MCLK = 256fs
unless otherwise stated.
PARAMETER
Input LOW level
Input HIGH level
Output LOW
Output HIGH
Power On Reset Threshold (DCVDD)
DCVDD Threshold On -> Off
Hysteresis
DCVDD Threshold Off -> On
Analogue Reference Levels
Reference voltage (VMID)
Potential divider resistance
0dBFs Full scale output voltage
Signal to Noise Ratio
(Note 1,2)
SNR
V
VMID
R
VMID
At LINE outputs
A-weighted,
@ fs = 48kHz
A-weighted
@ fs = 96kHz
A-weighted,
@ fs = 48kHz, AVDD
= 2.7V
Dynamic Range (Note 2)
Total Harmonic Distortion
Power Supply Rejection Ratio
DR
THD
PSRR
A-weighted, -60dB
full scale input
1kHz, 0dBFs
1kHz, -3dBFs
1kHz 100mVpp
20Hz to 20kHz
100mVpp
DAC channel separation
0dB Full scale output voltage
Signal to Noise Ratio
(Note 1,2)
Total Harmonic Distortion
SNR
THD
1kHz, 0dB
90
1kHz, 0dB signal
85
95
AVDD/2
50k
1.0 x
AVDD/3.3
100
100
98
V
Ω
Vrms
dB
0.9
0.3
0.6
V
V
V
SYMBOL
V
IL
V
IH
V
OL
V
OH
I
OL
= 1mA
I
OH
= -1mA
0.9 x DBVDD
0.7 x DBVDD
0.10 x
DBVDD
TEST CONDITIONS
MIN
TYP
MAX
0.3 x DBVDD
UNIT
V
V
V
V
Digital Logic Levels (CMOS Levels)
Line Output for DAC Playback Only (Load = 10KΩ. 50pF)
Ω
100
-86
-90
50
45
100
1.0 x
AVDD/3.3
101
-93
-85
-80
dB
dB
dB
dB
Vrms
dB
dB
Analogue Line Input to Line Output (Load = 10kΩ. 50pF, No Gain on Input ) Bypass Mode
Ω
w
PD Rev 4.3 September 2006
7