WM8734-EV1M
LINKS
LINKS & JUMPERS
J8
J21
J18
J14 (BCLK)
J16 (DACLRC)
J17 (ADCLRC)
DESCRIPTION
OPEN - SPI software interface control
SHORT - 2-wire software interface control
OPEN - ROUT signal is AC coupled
1
SHORT - ROUT signal with no AC coupling
OPEN - LOUT signal is AC coupled
SHORT - LOUT signal with no AC coupling
1
OPEN - Master mode
SHORT - Slave mode
OPEN - Master mode
SHORT - Slave mode
OPEN - Master mode
SHORT - Slave mode
ADCLRC input for slave mode
2
DACLRC output used for external sync
J9
J20
Table 3 Links
Note:
1.
2.
Caution: Output signals in this configuration will be DC biased to AVDD/2
When running the ADC in slave mode; ADCLRC can be generated from a correctly
formatted digital input on J12 or U1. SW3 must be in position 1-2.
SWITCHES
SWITCH
SW1
(DATA FORMAT)
1
1
1
1
2
0
0
0
3
0
0
0
4
1
0
0
5
0
0
0
DESCRIPTION
6
0
1
0
DATA FORMAT
I2S Compatible
24-bit Right Justified
Left Justified
SW2
After an input data format change has been made using SW1, the
CS8427 will only latch the new settings after SW2 has been pressed
and released.
Pins 1 & 2 SHORT - DACLRC used to supply ADCLRC in Slave Mode.
Pins 2 & 3 SHORT - external ADCLRC may be applied via J9.
SW3
Table 4 Switches
w
Rev 1.2 November 2002
5
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
