WM8973CLGEFL/RV 参数 Datasheet PDF下载

WM8973L

PIN DESCRIPTION

PIN NO

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

Note:

It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB.

NAME

MCLK

DCVDD

DBVDD

DGND

BCLK

DACDAT

DACLRC

ADCDAT

ADCLRC

MONOOUT

OUT3

ROUT1

LOUT1

HPGND

ROUT2

LOUT2

HPVDD

AVDD

AGND

VREF

VMID

MICBIAS

RINPUT3 /

HPDETECT

LINPUT3

RINPUT2

LINPUT2

RINPUT1

LINPUT1

MODE

CSB

SDIN

SCLK

Supply

Supply

Supply

Digital Input / Output

Digital Input

Digital Input / Output

Digital Output

Digital Input / Output

Analogue Output

Analogue Output

Analogue Output

Analogue Output

Supply

Analogue Output

Analogue Output

Supply

Supply

Supply

Analogue Output

Analogue Output

Analogue Output

Analogue Input

Analogue Input

Analogue Input

Analogue Input

Analogue Input

Analogue Input

Digital Input

Digital Input

Digital Input/Output

Digital Input

TYPE

Digital Input

Master Clock

Digital Core Supply

Digital Buffer (I/O) Supply

DESCRIPTION

Production Data

Digital Ground (return path for both DCVDD and DBVDD)

Audio Interface Bit Clock

DAC Digital Audio Data

Audio Interface Left / Right Clock/Clock Out

ADC Digital Audio Data

Audio Interface Left / Right Clock

Mono Output

Analogue Output 3 (can be used as Headphone Pseudo Ground)

Right Output 1 (Line or Headphone)

Left Output 1 (Line or Headphone)

Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)

Right Output 1 (Line or Headphone or Speaker)

Left Output 1 (Line or Headphone or Speaker)

Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT)

Analogue Supply

Analogue Ground (return path for both AVDD)

Reference Voltage Decoupling Capacitor

Midrail Voltage Decoupling Capacitor

Microphone Bias

Right Channel Input 3 or Headphone Plug-in Detection

Left Channel Input 3

Right Channel Input 2

Left Channel Input 2

Right Channel Input 1

Left Channel Input 1

Control Interface Selection

Chip Select / Device Address Selection

Control Interface Data Input / 2-wire Acknowledge output

Control Interface Clock Input

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PD, Rev 4.5, December 2011

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