欢迎访问ic37.com |
会员登录 免费注册
发布采购

X25330V14I-2.5 参数 Datasheet PDF下载

X25330V14I-2.5图片预览
型号: X25330V14I-2.5
PDF下载: 下载PDF文件 查看货源
内容描述: 5MHz的SPI串行è 2 PROM带座锁TM保护 [5MHz SPI Serial E 2 PROM with Block Lock TM Protection]
分类和应用: 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 14 页 / 77 K
品牌: XICOR [ XICOR INC. ]
 浏览型号X25330V14I-2.5的Datasheet PDF文件第2页浏览型号X25330V14I-2.5的Datasheet PDF文件第3页浏览型号X25330V14I-2.5的Datasheet PDF文件第4页浏览型号X25330V14I-2.5的Datasheet PDF文件第5页浏览型号X25330V14I-2.5的Datasheet PDF文件第6页浏览型号X25330V14I-2.5的Datasheet PDF文件第7页浏览型号X25330V14I-2.5的Datasheet PDF文件第8页浏览型号X25330V14I-2.5的Datasheet PDF文件第9页  
32K
X25330
5MHz SPI Serial E
2
PROM with Block Lock
TM
Protection
4K x 8 Bit
FEATURES
DESCRIPTION
The X25330 is a CMOS 32K-bit serial E
2
PROM, inter-
nally organized as 4K x 8. The X25330 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing
any number of devices to share the same bus.
The X25330 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25330 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as
a hardwire input to the X25330 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25330 utilizes Xicor’s proprietary Direct Write
TM
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
5MHz Clock Rate
Low Power CMOS
<1
µ
A Standby Current
<5mA Active Current
2.5V To 5.5V Power Supply
SPI Modes (0,0 & 1,1)
4K X 8 Bits
32 Byte Page Mode
Block Lock™ Protection
Protect 1/4, 1/2 or all of E
2
PROM Array
Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
Packages
8-Lead SOIC
14-Lead TSSOP
FUNCTIONAL DIAGRAM
ST
ATUS
REGISTER
WRITE
PROTECT
LOGIC
X DECODE
LOGIC
32
32 X 256
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
32
32 X 256
4K BYTE
ARRAY
64
64 X 256
WP
WRITE
CONTROL
AND
TIMING
LOGIC
32
8
Y DECODE
DATA REGISTER
7037 FRM F01
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.
©
Xicor, Inc. 1994 - 1997 Patents Pending
7048–1.0 6/18/97 T0/C0/D0 SH
1
Characteristics subject to change without notice