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X28C64S-15 参数 Datasheet PDF下载

X28C64S-15图片预览
型号: X28C64S-15
PDF下载: 下载PDF文件 查看货源
内容描述: 5伏,可变的字节E2PROM [5 Volt, Byte Alterable E2PROM]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 25 页 / 112 K
品牌: XICOR [ XICOR INC. ]
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X28C64  
HARDWARE DATA PROTECTION  
The X28C64 can be automatically protected during  
power-upandpower-downwithouttheneedforexternal  
circuits by employing the software data protection fea-  
ture. The internal software data protection circuit is  
enabled after the first write operation utilizing the soft-  
warealgorithm. Thiscircuitisnonvolatileandwillremain  
set for the life of the device unless the reset command  
is issued.  
The X28C64 provides three hardware features (com-  
patible with X2864A) that protect nonvolatile data from  
inadvertent writes.  
Noise Protection—A WE pulse typically less than  
20ns will not initiate a write cycle.  
Default VCC Sense—All write functions are inhibited  
when VCC is 3V typically.  
Once the software protection is enabled, the X28C64 is  
also protected from inadvertent and accidental writes in  
the powered-on state. That is, the software algorithm  
must be issued prior to writing additional data to the  
device.  
Write Inhibit—Holding either OE LOW, WE HIGH, or  
CE HIGHwillpreventaninadvertentwritecycleduring  
power-up and power-down, maintaining data integrity.  
SOFTWARE DATA PROTECTION  
TheX28C64offersasoftwarecontrolleddataprotection  
feature. The X28C64 is shipped from Xicor with the  
software data protection NOT ENABLED; that is, the  
device will be in the standard operating mode. In this  
mode data should be protected during power-up/-down  
operations through the use of external circuits. The host  
would then have open read and write access of the  
device once VCC was stable.  
SOFTWARE ALGORITHM  
Selecting the software data protection mode requires  
the host system to precede data write operations by a  
series of three write operations to three specific ad-  
dresses. Refer to Figure 6 and 7 for the sequence. The  
three-byte sequence opens the page write window  
enabling the host to write from one to sixty-four bytes of  
data*. Once the page load cycle has been completed,  
the device will automatically be returned to the data  
protected state.  
Note: *Once the three-byte sequence is issued it must be  
followed by a valid byte or page write operation.  
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