欢迎访问ic37.com |
会员登录 免费注册
发布采购

X5043S8-2.7 参数 Datasheet PDF下载

X5043S8-2.7图片预览
型号: X5043S8-2.7
PDF下载: 下载PDF文件 查看货源
内容描述: CPU监控器, 4K SPI EEPROM [CPU Supervisor with 4K SPI EEPROM]
分类和应用: 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 20 页 / 110 K
品牌: XICOR [ XICOR INC. ]
 浏览型号X5043S8-2.7的Datasheet PDF文件第2页浏览型号X5043S8-2.7的Datasheet PDF文件第3页浏览型号X5043S8-2.7的Datasheet PDF文件第4页浏览型号X5043S8-2.7的Datasheet PDF文件第5页浏览型号X5043S8-2.7的Datasheet PDF文件第6页浏览型号X5043S8-2.7的Datasheet PDF文件第7页浏览型号X5043S8-2.7的Datasheet PDF文件第8页浏览型号X5043S8-2.7的Datasheet PDF文件第9页  
4K
X5043/X5045
CPU Supervisor with 4K SPI EEPROM
512 x 8 Bit
FEATURES
• Selectable time out watchdog timer
• Low V
CC
detection and reset assertion
—Five standard reset threshold voltages
—Re-program low V
CC
reset threshold voltage
using special programming sequence.
—Reset signal valid to V
CC
= 1V
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<10µA max standby current, watchdog off
—<2mA max active current during read
• 2.7V to 5.5V and 4.5V to 5.5V power supply
versions
• 4Kbits of EEPROM–1M write cycle endurance
• Save critical data with Block Lock
memory
—Protect 1/4, 1/2, all or none of EEPROM array
• Built-in inadvertent write protection
—Write enable latch
—Write protect pin
• 3.3MHz clock rate
• Minimize programming time
—16-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• SPI modes (0,0 & 1,1)
• Available packages
—8-lead MSOP, 8-lead SOIC, 8-pin PDIP
—14-lead TSSOP
BLOCK DIAGRAM
Watchdog Transition
Detector
WP
SI
SO
SCK
Data
Register
Command
Decode &
Control
Logic
V
CC
Threshold
Reset Logic
DESCRIPTION
These devices combine four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Block Lock Protect Serial EEPROM
Memory in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscil-
lator to stabilize before the processor executes code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the RESET/
RESET signal. The user selects the interval from three
preset values. Once selected, the interval does not
change, even after cycling the power.
The device’s low V
CC
detection circuitry protects the
user’s system from low voltage conditions, resetting
the system when V
CC
falls below the minimum V
CC
trip point. RESET/RESET is asserted until V
CC
returns
to proper operating level and stabilizes. Five industry
standard V
TRIP
thresholds are available, however,
Xicor’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
Watchdog
Timer Reset
Protect Logic
RESET/RESET
Status
Register
EEPROM Array
1Kbits
1Kbits
2Kbits
Reset &
Watchdog
Timebase
X5043 = RESET
X5045 = RESET
CS/WDI
V
CC
V
TRIP
+
-
Power on and
Low Voltage
Reset
Generation
REV 1.1.2 5/29/01
www.xicor.com
Characteristics subject to change without notice.
1 of 20