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X9250UV24I 参数 Datasheet PDF下载

X9250UV24I图片预览
型号: X9250UV24I
PDF下载: 下载PDF文件 查看货源
内容描述: 四通道数字电位器( XDCP ) [Quad Digitally Controlled Potentiometers (XDCP)]
分类和应用: 转换器电位器电阻器光电二极管
文件页数/大小: 21 页 / 182 K
品牌: XICOR [ XICOR INC. ]
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X9250  
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)  
Limits  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Unit  
Test Conditions  
I
V
supply current  
400  
µA  
f = 2MHz, SO = Open,  
SCK  
CC1  
CC  
(active)  
Other Inputs = V  
SS  
I
V
supply current  
1
mA  
f
= 2MHz, SO = Open,  
CC2  
CC  
SCK  
(nonvolatile write)  
Other Inputs = V  
SS  
I
V
current (standby)  
5
µA  
µA  
µA  
V
SCK = SI = V , Addr. = V  
SS SS  
SB  
CC  
I
Input leakage current  
Output leakage current  
Input HIGH voltage  
Input LOW voltage  
Output LOW voltage  
10  
10  
V
V
= V to V  
SS CC  
LI  
IN  
I
= V to V  
SS CC  
LO  
OUT  
V
V
x 0.7  
V
+ 0.1  
IH  
CC  
CC  
V
–0.5  
V
x 0.3  
CC  
V
IL  
V
0.4  
V
I
= 3mA  
OL  
OL  
ENDURANCE AND DATA RETENTION  
Parameter  
Minimum endurance  
Data retention  
Min.  
100,000  
100  
Unit  
Data changes per bit per register  
Years  
CAPACITANCE  
Symbol  
Test  
Max.  
Unit  
pF  
Test Conditions  
= 0V  
(5)  
OUT  
C
Output capacitance (SO)  
8
6
V
OUT  
(5)  
IN  
C
Input capacitance (A0, A1, SI, and SCK, CS)  
pF  
V
= 0V  
IN  
POWER-UP TIMING  
Symbol  
Parameter  
Min.  
Max.  
Unit  
ms  
(6)  
PUR  
t
Power-up to initiation of read operation  
Power-up to initiation of write operation  
1
5
(6)  
PUW  
t
ms  
(7)  
CC  
t V  
V power up ramp rate  
CC  
0.2  
50  
V/msec  
R
POWER UP AND DOWN REQUIREMENT  
The are no restrictions on the sequencing of the bias supplies V , V+, and V- provided that all three supplies reach  
CC  
their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than  
V+ and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach  
their final value.The V ramp rate spec is always in effect.  
CC  
Notes: (5) This parameter is periodically sampled and not 100% tested  
(6) t  
and t  
are the delays required from the time the third (last) power supply (V , V+ or V-) is stable until the specific instruction can  
PUR  
PUW CC  
be issued.These parameters are periodically sampled and not 100% tested.  
(7) Sample tested only.  
A.C. TEST CONDITIONS  
Input pulse levels  
V
x 0.1 to V x 0.9  
CC  
CC  
Input rise and fall times  
Input and output timing level  
10ns  
V
x 0.5  
CC  
Characteristics subject to change without notice. 11 of 21  
REV 1.1.5 1/31/03  
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