Le75282
Data Sheet
Temperature Shutdown Mechanism
When the device temperature reaches a minimum of 110 °C, the thermal shutdown mechanism will activate and force the device
into an All Off state, regardless of the logic input pins. Pin TSDx will read low (0 V) when the device is in the thermal shutdown
state and high (VDD) during normal operation. When the device comes out of thermal shutdown and the TSDx output returns high,
the Le75282 device returns to its previously programmed RD1-RD3 state.
During a lightning event, due to the relatively short duration, the thermal shutdown will not typically activate.
During an extended power cross, the device temperature will rise and cause the device to enter the thermal shutdown state. This
forces an All Off state, and the current seen at ASLICx/BSLICx drops to zero. Once in the thermal shutdown state, the device will
cool and exit the thermal shutdown state, thus re-entering the state it was in prior to thermal shutdown. Current, limited to the dc
current-limit value, will again begin to flow and device heating will begin again. This cycle of entering and exiting thermal
shutdown will last as long as the power-cross fault is present.
If the magnitude of power is great enough, the external secondary protector could trigger, thereby shunting all current to ground.
EXTERNAL SECONDARY PROTECTION
An overvoltage secondary protection device on the loop side of the Le75282 device is required. The purpose of this device is to
limit fault voltages seen by the Le75282 device so as not to exceed the breakdown voltage or input-output isolation rating of the
device. To minimize stress on the Le75282 device, use of a foldback- or crowbar-type device is recommended. Basic design
equations governing the choice of external secondary protector are given below:
•
•
•
|VBHmax| + |Vbreakovermax| < |Vbreakdownmin(break)|
|Vringingpeakmax| + |VBHmax| + |Vbreakovermax| < |Vbreakdownmin(ring)|
|Vringingpeakmax| + |VBHmax| < |Vbreakovermin|
where:
VBHmax—Maximum magnitude of battery voltage.
Vbreakovermax—Maximum magnitude breakover voltage of external secondary protector.
Vbreakovermin—Minimum magnitude breakover voltage of external secondary protector.
Vbreakdownmin(break)—Minimum magnitude breakdown voltage of Le75282 break switch.
Vbreakdownmin(ring)—Minimum magnitude breakdown voltage of Le75282 ringing access switch.
Vringingpeakmax—Maximum magnitude peak voltage of ringing signal.
Series current-limiting fused resistors or PTC’s should be chosen so as not to exceed the current rating of the external secondary
protector. Refer to the manufacturer’s data sheet for requirements.
Test Access Switch Protection Considerations
The most robust design has proper capacitive termination of the test access switches. For a 24 or 32 channel test bus, when all
the test leads are tied together, the overall capacitance of the test bus provides adequate termination for the test access switches.
For a test bus with less than 24 channels, tie all the leads together and add a single test bus capacitor on ATESTx to ground and
on BTESTx to ground with a value of 32 pF for each channel less than 24. For any termination scheme, capacitance to ground
on the test nodes should be kept less than 10 nF.
Systems that do not use the test access switch functionality must also add capacitance to the test switch node or short the test
switches. If the test access switches are not to be used, ATEST1 and ATEST2 can be tied together with a 1 nF, 100 V capacitor
on this node to ground. Likewise, tie BTEST1 and BTEST2 together with a 1 nF, 100 V capacitor on this node to ground.
Alternatively, the test access switches can be shorted out. ATESTx can be shorted to ALINEx and BTESTx shorted to BLINEx.
Note, with the test switches shorted, test switch state becomes irrelevant.
In addition, using a low voltage secondary protector on A lead and an asymmetrical protector on B lead (with respect to positive
and negative voltage) is recommended. Refer to the Le79232 ISLIC data sheet for protection values.
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
