MT88E43B
Extended Voltage Calling Number
Identification Circuit 2
CMOS
Data Sheet
Features
•
Compatible with:
• British Telecom (BT) SIN227 & SIN242
•
•
•
•
•
•
•
•
•
•
•
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U.K.’s Cable Communications Association
(CCA) specification TW/P&E/312
Bellcore GR-30-CORE (formerly known as
TR-NWT-000030) & SR-TSV-002476
Ordering Information
MT88E43BE
24 Pin PDIP
MT88E43BS
24 Pin SOIC
MT88E43BSR 24 Pin SOIC
MT88E43BS1 24 Pin SOIC*
MT88E43BSR1 24 Pin SOIC*
*Pb Free Matte Tin
-40°C to +85°C
•
•
•
•
Feature phones, including Analog Display
Services Interface (ADSI) phones
Phone set adjunct boxes
FAX and answering machines
Database query and Computer Telephony
Integration (CTI) systems
Tubes
Tubes
Tape & Reel
Tubes
Tape & Reel
April 2006
Bellcore "CPE Alerting Signal (CAS)" and BT
"Idle State Tone Alert Signal" detection
Ring and line reversal detection
1200 baud Bell 202 and CCITT V.23 Frequency
Shift Keying (FSK) demodulation
3 or 5 V
±10%
supply voltage
High input sensitivity (-40 dBV Tone and FSK
Detection)
Selectable 3-wire data interface (microcontroller
or MT88E43 controlled)
Low power CMOS with powerdown mode
Input gain adjustable amplifier
Carrier detect status output
Uses 3.58 MHz crystal
Description
The MT88E43 Calling Number Identification Circuit 2
(ECNIC2) is a low power CMOS integrated circuit
intended for receiving physical layer signals
transmitted according to BT (British Telecom) SIN227
& SIN242, the U.K.’s CCA (Cable Communications
Association) TW/P&E/312 and Bellcore GR-30-CORE
& SR-TSV-002476 specifications. The MT88E43 is
suitable for applications using a fixed voltage power
source between 3 and 5 V
±10%.
FSKen
MODE
DCLK
DATA
DR
Applications
•
BT Calling Line Identity Presentation (CLIP), CCA
CLIP, and Bellcore Calling Identity Delivery (CID)
systems
IN+
IN-
GS
+
-
Anti-alias
Filter
FSK Bandpass
Filter
FSK
Demodulator
Data Timing
Recovery
To internal
cct.
VRef
CAP
PWDN
Bias
Generator
Carrier
Detector
CD
Interrupt
Generator
INT
Alert Signal High
Tone Filter
To internal cct.
Alert Signal Low
Tone Filter
Oscillator
Tone
Detection
Algorithm
Guard
Time
StD
St/GT
ESt
VDD
VSS
OSCin OSCout TRIGin
TRIGRC
TRIGout
Figure 1 - Functional Block Diagram
1
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Copyright 1997-2006, Zarlink Semiconductor Inc. All Rights Reserved.
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