Data Sheet
MT88E43
AC Electrical Characteristics† - 3-Wire Interface Timing
Characteristics
Power-up time
Sym
Min
Max
Units
Notes
1
2
3
4
5
tPU
tPD
tCP
tCA
50
1
ms
ms
ms
ms
ms
PWDN
OSC1
Power-down time
Input FSK to CD low delay
Input FSK to CD high delay
Hysteresis
25
CD
8
8
† AC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics† - 3-Wire Interface Timing (Mode 0)
Characteristics
Rise time
Sym
Min
Typ‡
Max
Units
Notes*
1
2
tRR
tRF
tRL
200
200
417
1212
5
ns
ns
into 50pF Load
DR
Fall time
into 50pF Load
3
Low time
415
416
1200
1
ms
2
1
4
Rate
1188
baud
ms
ns
DATA
5
Input FSK to DATA delay
Rise time
tIDD
tR
6
200
200
into 50pF Load
7
Fall time
tF
ns
into 50pF Load
DATA
DCLK
8
DATA to DCLK delay
DCLK to DATA delay
Frequency
tDCD
tCDD
6
6
416
416
ms
1, 2, 3
9
ms
1, 2, 3
10
11
12
13
fDCLK0 1201.6 1202.8 1204
Hz
ms
2
2
2
2
DCLK
High time
tCH
tCL
415
415
415
416
416
416
417
417
417
Low time
ms
DCLK
DR
DCLK to DR delay
tCRD
ms
† AC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
o
‡ Typical figures are at 25 C and are for design aid only: not guaranteed and not subject to production testing.
*Notes:
1. FSK input data at 1200 ±12 baud.
2. OSC1 at 3.579545 MHz ±0.1%.
3. Function of signal condition.
AC Electrical Characteristics† - 3-Wire Interface Timing (Mode 1)
Characteristics
Frequency
Sym
Min
Max
Units
Notes
1
2
3
4
5
fDCLK1
1
MHz
%
DCLK
Duty cycle
30
70
20
Rise time
tR1
ns
DCLK low set up to DR
DCLK low hold time after DR
tDDS
tDDH
500
500
ns
DCLK,
DR
ns
† AC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
