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MT88L70ANR1 参数 Datasheet PDF下载

MT88L70ANR1图片预览
型号: MT88L70ANR1
PDF下载: 下载PDF文件 查看货源
内容描述: 3伏集成DTMF接收器 [3 Volt Integrated DTMF Receiver]
分类和应用: 电信集成电路电信信令电路电信电路光电二极管
文件页数/大小: 16 页 / 476 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT88L70
3 Volt Integrated DTMF Receiver
Data Sheet
Features
2.7 - 3.6 volt operation
Complete DTMF receiver
Low power consumption
Internal gain setting amplifier
Adjustable guard time
Central office quality
Power-down mode
Inhibit mode
Functionally compatible with Zarlink’s MT8870D
Ordering Information
MT88L70AE
MT88L70AS
MT88L70AN
MT88L70ASR
MT88L70ANR
MT88L70AE1
MT88L70AN1
MT88L70ANR1
MT88L70AS1
MT88L70ASR1
18
18
20
18
20
18
20
20
18
18
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
PDIP
SOIC
SSOP
SOIC
SSOP
PDIP*
SSOP*
SSOP*
SOIC*
SOIC*
Tubes
Tubes
Tubes
Tape &
Tape &
Tubes
Tubes
Tape &
Tubes
Tape &
August 2005
Reel
Reel
Reel
Reel
* Pb Free Matte Tin
-40°C to +85°C
Applications
Paging systems
Repeater systems/mobile radio
Credit card systems
Remote control
Personal computers
Telephone answering machine
VDD
VSS
VRef
Description
The MT88L70 is a complete 3 Volt, DTMF receiver
integrating both the bandsplit filter and digital decoder
functions. The filter section uses switched capacitor
techniques for high and low group filters; the decoder
uses digital counting techniques to detect and decode
all 16 DTMF tone-pairs into a 4-bit code. External
component count is minimized by on chip provision of
a differential input amplifier, clock oscillator and latched
three-state bus interface.
INH
PWDN
Bias
Circuit
VRef
Buffer
Q1
High Group
Filter
Dial
Tone
Filter
Low Group
Filter
Zero Crossing
Detectors
Digital
Detection
Algorithm
Code
Converter
and Latch
Q2
Q3
Q4
Chip Chip
Power Bias
IN +
IN -
GS
to all
Chip
Clocks
St
GT
Steering
Logic
OSC1
OSC2
St/GT
ESt
STD
TOE
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1997-2005, Zarlink Semiconductor Inc. All Rights Reserved.