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MT89L80AP 参数 Datasheet PDF下载

MT89L80AP图片预览
型号: MT89L80AP
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUSTM家庭 [CMOS ST-BUSTM Family]
分类和应用:
文件页数/大小: 17 页 / 350 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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CMOS ST-BUS
TM
Family MT89L80
Digital Switch
Data Sheet
Features
3.3 volt supply
5 V tolerant inputs and TTL compatible outputs.
256 x 256 channel non-blocking switch
Accepts serial streams at 2.048 Mb/s
Per-channel three-state control
Patented per channel message mode
Non-multiplexed microprocessor interface
Zarlink ST-BUS compatible
Low power consumption: typical 15 mW
Pin compatible with the MT8980DP
Ordering Information
MT89L80ANR
48 Pin SSOP
MT89L80APR
44 Pin PLCC
MT89L80AP
44 Pin PLCC
MT89L80AN
48 Pin SSOP
MT89L80APR1
44 Pin PLCC*
MT89L80ANR1
48 Pin SSOP*
MT89L80AN1
48 Pin SSOP*
MT89L80AP1
44 Pin PLCC*
*Pb Free Matte Tin
Tape & Reel
Tape & Reel
Tubes
Tubes
Tape & Reel
Tubes
Tubes
Tubes
Sept. 2006
-40°C to +85°C
Description
This VLSI CMOS device is designed for switching
PCM-encoded voice or data, under microprocessor
control, in a modern digital exchange, PBX or Central
Office. It provides simultaneous connections for up to
256 64 kbit/s channels. Each of the eight serial inputs
and outputs consist of 32 64 kbit/s channels
multiplexed to form a 2048 kbit/s ST-BUS stream. In
addition, the MT89L80 provides microprocessor read
and write access to individual ST-BUS channels.
Applications
Key telephone systems
PBX systems
Small and medium voice switching systems
C4i
F0i RESET V
DD
V
SS
**
ODE
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
Serial
to
Parallel
Converter
Data
Memory
Frame
Counter
Output
MUX
Parallel
to
Serial
Converter
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
Control Register
Connection
Memory
Control Interface
DS CS R/W A5/
A0
DTA D7/
D0
CSTo
** for 48-pin SSOP only
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2006, Zarlink Semiconductor Inc. All Rights Reserved.