MT9076B
T1/E1/J1 3.3 V Single Chip Transceiver
Data Sheet
Features
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Combined T1/E1/J1 framer and LIU, with PLL and
3 HDLCs
In T1/J1 mode the LIU can recover signals
attenuated by up to 36 dB (at 772 kHz)
In E1 mode the LIU can recover signals
attenuated by up to 40 dB (at 1.024 MHz)
Low jitter digital PLL (intrinsic jitter < 0.02UI)
HDLCs can be assigned to any timeslot
Comprehensive alarm detection, performance
monitoring and error insertion functions
2.048 Mbit/s or 8.192 Mbit/s ST-BUS streams
Support for Inverse Mux for ATM (IMA)
Support for V5.1 and V5.2 Access Networks
3.3 V operation with 5 V tolerant inputs
Intel or Motorola non-multiplexed 8-bit
microprocessor port
JTAG boundary scan
Ordering Information
MT9076BP
MT9076BB
MT9076BPR
MT9076BB1
MT9076BP1
68 Pin PLCC
Tubes
80 Pin LQFP
Trays
68 Pin PLCC
Tape & Reel
80 Pin LQFP*
Trays
68 Pin PLCC*
Tubes
*Pb Free Matte Tin
-40°C to +85°C
December 2005
Applications
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T1/E1/J1 add/drop multiplexers
Access networks
Wireless base stations
CO and CPE equipment interfaces
Primary rate ISDN nodes
Digital Cross-connect Systems (DCS)
TxDL TxDLCLK
TxMF
TxAO TxB TxA
DSTi
CSTi
Tdi
Tdo
Tms
Tclk
Trst
ST-BUS
Interface
IEEE
1149.1
Transmit Framing, Error,
Test Signal Generation and Slip Buffer
Pulse
Generator
Line
Driver
TTIP
TRING
RM
Loop
National
Bit Buffer
Data Link,
HDLC0
HDLC1
Jitter Attenuator
& Clock Control
CAS
Buffer
MT
Loop
ST Loop
PL Loop
Microprocessor
Interface
IRQ
D7~D0
AC4
R/W/WR
S/FR
BS/LS
OSC1
OSC2
CS
DS/RD
DSTo
CSTo
Rx Equalizer
& Data Slicer
AC0
Clock,Data
Recovery
DG Loop
RTIP
RRING
ST-BUS
Interface
Receive Framing, Performance Monitoring,
Alarm Detection, 2 Frame Slip Buffer
RxDLCLK RxDL
RxMF
/TxFP
LOS
RxFP
Exclk
F0b
C4b
Figure 1 - MT9076 Functional Block
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
