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MT90866 参数 Datasheet PDF下载

MT90866图片预览
型号: MT90866
PDF下载: 下载PDF文件 查看货源
内容描述: 灵活的4K的X 2.4 K通道数字开关,具有H.110接口和2.4的K× 2.4 K条本地交换机 [Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch]
分类和应用: 开关
文件页数/大小: 86 页 / 695 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT90866
Flexible 4 K x 2.4 K Channel Digital Switch with
H.110 Interface and 2.4 K x 2.4 K Local Switch
Data Sheet
Features
2,432 x 2,432 non-blocking switching among local
streams
4,096 x 2,432 blocking switching between
backplane and local streams
2,048 x 2,048 non-blocking switching among
backplane streams
Rate conversion between backplane and local
streams
Rate conversion among local streams
Backplane interface accepts data rates of
8.192 Mb/s or 16.384 Mb/s
Local interface accepts data rates of 2.048 Mb/s,
4.096 Mb/s or 8.192 Mb/s
Sub-rate switching (2 or 4 bits) configuration for
local streams at a data rate of 2.048 Mb/s
Meets all the key H.110 mandatory signal
requirements including timing
Per-channel variable or constant throughput
delay
Per-stream input delay, programmable for local
streams on a per bit basis
Per-stream output advancement, programmable
for backplane and local streams
Per-channel direction control for backplane
streams
Per-channel message mode for backplane and
local streams
Per-channel high impedance output control for
backplane and local streams
Compatible to Stratum 4 Enhanced clock
switching standard
-
Integrated PLL conforms to Telcordia GR-1244-
CORE Stratum 4 Enhanced switching standard
-Holdover Mode with holdover frequency
stability of 0.07 ppm
- Jitter attenuation from 1.52 Hz.
- Time interval error (TIE) correction
- Master and Slave mode operation
Ordering Information
MT90866AG
344 Ball PBGA
Trays
MT90866AG2 344 Ball PBGA* Trays
*Pb Free Tin/Silver/Copper
-40°C to +85°C
Connection memory block-programming for fast
device initialization
Tristate-control outputs for external drivers
Pseudo-Random Binary Sequence (PRBS) pattern
generation and testing for backplane and local
streams
Conforms to the mandatory requirements of the
IEEE-1149.1 (JTAG) standard
3.3V operation with 5 V tolerant inputs and I/O’s
5 V tolerant PCI driver on CT-Bus I/O’s
September 2005
Applications
Carrier-grade VoIP Gateways
IP-PBX and PABX
Integrated Access Devices
Access Servers
CTI Applications/CompactPCI
®
Platforms
H.110, H.100, ST-BUS and proprietary Backplane
Applications
Description
The MT90866 Digital Switch provides switching
capacities of 4,096 x 2,432 channels between
backplane and local streams, 2,432 x 2,432 channels
among local streams and 2,048 x 2,048 channels
among backplane streams. The local connected serial
inputs and outputs have 32, 64 and 128 64 kb/s
channels per frame with data rates of 2.048, 4.096 and
8.192 Mb/s respectively. The backplane connected
serial inputs and outputs have 128 and 256 64 kb/s
channels per frame with data rates of 8.192 and
16.384 Mb/s respectively.
Non-multiplexed microprocessor interface
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.