ISO
2
-CMOS
MT91L60/61
3 Volt Multi-Featured Codec (MFC)
Data Sheet
Features
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•
Single 2.7-3.6 volt supply operation
MT91L61 version features a delayed framing
pulse in SSI and ST-BUS modes to facilitate
cascaded devices
Programmable
µ-Law/A-Law
Codec and Filters
Programmable ITU-T (G.711)/sign-magnitude
coding
Programmable transmit, receive and side-tone
gains
Fully differential interface to handset transducers
- including 300 ohm receiver driver
Flexible digital interface including ST-BUS/SSI
Serial microport
Low power operation
ITU-T G.714 compliant
Multiple power down modes
Ordering Information
MT91L61AE
24 Pin PDIP
MT91L60AE
24 Pin PDIP
MT91L61AS
24 Pin SOIC
MT91L60AS
20 Pin SOIC
MT91L61AN
24 Pin SSOP
MT91L60AN
20 Pin SSOP
MT91L60ASR
20 Pin SOIC
MT91L61ASR
24 Pin SOIC
MT91L61ASR1 24 Pin SOIC*
MT9160AN1
20 Pin SSOP*
*Pb Free Matte Tin
-40°C to +85°C
March 2006
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•
•
•
•
•
•
•
•
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tubes
Applications
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•
•
•
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Battery operated equipment
Digital telephone sets
Cellular radio sets
Local area communications stations
Pair Gain Systems
Line cards
VSSD
VDD
VSSA
VBias
VRef
FILTER/CODEC GAIN
M-
ENCODER
DECODER
7dB
-7dB
Transducer
Interface
M+
HSPKR +
HSPKR -
Din
Dout
STB/F0i
CLOCKin
STBd/FOod
(MT91L61only)
Flexible
Digital
Interface
Timing
ST-BUS
C&D
Channels
Serial Microport
A/µ/IRQ
PWRST
IC
CS
DATA1
DATA2
SCLK
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
