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MVTX2603AG 参数 Datasheet PDF下载

MVTX2603AG图片预览
型号: MVTX2603AG
PDF下载: 下载PDF文件 查看货源
内容描述: 非网管型24端口10/100兆+ 2端口1 Gb以太网交换机 [Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch]
分类和应用: 网络接口电信电路以太网局域网(LAN)标准
文件页数/大小: 109 页 / 793 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MVTX2603
Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb
Ethernet Switch
Data Sheet
Features
Integrated Single-Chip 10/100/1000 Mbps
Ethernet Switch
24 10/100 Mbps Autosensing, Fast Ethernet
Ports with RMII or Serial Interface (7WS)
2 Gigabit Ports with GMII, PCS, 10/100 and
stacking (2 G per port) interface options per port
Serial interface for configuration
Supports two Frame Buffer Memory domains with
SRAM at 100 MHz
Supports memory size 2 MB, or 4 MB
• For 24+2, two SRAM domains (2 MB or 4 MB) are
required.
• For 24+2 stacking (2 G per stacking port), two ZBT
domains (2 MB or 4 MB) are required.
February 2004
Ordering Information
MVTX2603AG
553 Pin HSBGA
-40°C to +85°C
Supports per-system option to enable flow control
for best effort frames even on QoS-enabled ports
Load sharing among trunked ports can be based
on source MAC and/or destination MAC. The
Gigabit trunking group has one more option,
based on source port.
Port Mirroring to a dedicated port or port 23
Built-in reset logic triggered by system
malfunction
I
2
C EEPROM for configuration
Traffic Classification
• 4 transmission priorities for Fast Ethernet ports with 2
dropping levels
• Classification based on:
- Port based priority
- VLAN Priority field in VLAN tagged frame
Applies centralized shared memory architecture
Up to 64K MAC addresses
Maximum throughput is 6.4 Gbps non-blocking
High performance packet forwarding (19.047 M
packets per second) at full wire speed
Full Duplex Ethernet IEEE 802.3x Flow Control
Backpressure flow control for Half Duplex ports
Supports Ethernet multicasting and broadcasting
and flooding control
VLAN 1 MCT
Frame Data Buffer A
SRAM (1 M / 2 M)
VLAN 1 MCT
Frame Data Buffer B
SRAM (1 M / 2 M)
FDB Interface
LED
FCB
Frame Engine
Search
Engine
MCT
Link
24 x 10 /100
RMII
Ports 0 - 23
GMII/
PCS
Port
24
GMII/
PCS
Port
25
Management
Module
Parallel/
Serial
Figure 1 - MVTX2603 System Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.