SL1935
Single Chip Synthesized Zero IF Tuner
April 2004
Features
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Single chip synthesised tuner solution for quadrature
down conversion, L-band to Zero IF.
DVB compliant, operating dynamic range -70 to
-20dBm.
Compatible with DSS and DVB variable symbol rate
applications.
Selectable baseband path, programmable through
I
2
C bus.
Excellent quadrature balance up to 30MHz
baseband
Excellent immunity to spurious second harmonic
(RF and LO) mixing effects.
Low oscillator phase noise and reradiation.
High output referred linearity for low distortion and
multi channel application.
Integral fast mode compliant I
2
C bus controlled PLL
frequency synthesiser, designed for high comparison
frequencies and low phase noise performance.
Buffered crystal output for clocking QPSK
demodulator.
ESD protection (Normal ESD handling procedures
should be observed).
Ordering Information
SL1935D/KG/NP1P (Tubes)
36 pin SSOP
SL1935D/KG/NP1Q (Tape and Reel)
36 pin SSOP
Description
The SL1935 is a complete single chip I
2
C bus controlled
Zero IF tuner and operates from 950 to 2150MHz. It
includes an on-board low phase noise PLL frequency
synthesiser and low noise LNA/AGC. The SL1935 is
intended primarily for application in digital satellite Network
Interface Modules and performs the complete tuner
function.
The device contains all elements necessary, with the
exception of local oscillator tuning network and crystal
reference, to produce a high performance I(n-phase) &
Q(uadrature) downconversion tuner function. Due to the
high signal handling design the device does not require
any front end tracking filters.
The SL1935 includes selectable baseband signal paths,
allowing application with two externally definable filter
bandwidths, facilitating application in variable symbol
rate and simulcast systems. The SL1935 is optimised to
interface with the VP310 (ADC/QPSK/FEC) Satellite
Channel Decoder, available from Zarlink Semiconductor
and offers a full front end solution.
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Applications
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Satellite receiver systems.
Data communications systems.
XTALCAP
XTAL
SDA
SCL
BUFREF
VCCD
VCC
RF
RFB
VCC
IFIA
IFIB
VCC
OFIA
OFIB
VEE
IOUT
ADD
1
36
18
19
PUMP
DRIVE
PORT P0
VEE
TANKS
TANKSB
VEE
TANKV
TANKVB
VEE
IFQA
IFQB
VCC
OFQA
OFQB
VEE
QOUT
AGCCONT
Figure 1. Pin connections
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003 - 2004, Zarlink Semiconductor Inc. All Rights Reserved.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
