PCA0163A
9939 Via Pasar • San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-80
-90
-100
FEATURES
• Frequency Range: 163.84 - 163.84 MHz
• Step Size:
80 KHz
• cPLL - Style Package
APPLICATIONS
• Telecommunications
• Satellite
• Telemetry
PERFORMANCE SPECIFICATIONS
Frequency Range
RMS Phase Error (100 Hz - 100 KHz)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
-110
-120
-130
-140
2
10
10
3
10
4
10
5
VALUE
163.84
-
163.84
1.0
-10
-70
0±2
50
80
1250
n/a
4
-40 to 85
cPLL
3
21
APPLICATION NOTES
UNITS
MHz
°
dBc
dBc
dBm
Ω
KHz
µΑ
mSec
mSec
°C
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
Vdc
mA
All specifications are typical unless otherwise noted and subject to change without notice.
•
AN-107 : How to Solder Z-COMM VCOs / PLLs
•
AN-200 : Mounting and Grounding of Z-COMM PLLs
•
AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
f
osc
<100 MHz
Frequency Synthesizer: Analog Devices - ADF4001
© Z-Communications, Inc.
Page 1
All rights reserved
ZCOMM [ Z-COMMUNICATIONS, INC ]
