PCA0300A
9939 Via Pasar • San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-80
-90
-100
-110
-120
-130
-140
-150
FEATURES
-
• Frequency Range:
• Step Size:
275
100
325
MHz
KHz
•
- Style Package
cPLL
APPLICATIONS
• Satellite Modems
• Mobile Radios
102
103
104
105
106
CATV
•
VALUE
275 - 325
1.0
UNITS
MHz
°
PERFORMANCE SPECIFICATIONS
Frequency Range
RMS Phase Error (100 Hz - 100 KHz)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
dBc
dBc
dBm
-7
-65
Power Output
4±3
50
Load Impedance
Step Size
Ω
100
1250
KHz
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
µΑ
mSec
3
5
mSec
°C
-40 to 85
Operating Temperature Range
Package Style
cPLL
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Vdc
mA
Supply Current (Icc, typ.)
24
All specifications are typical unless otherwise noted and subject to change without notice.
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<fosc<100 MHz
Frequency Synthesizer IC: Analog Devices - ADF4113
© Z-Communications, Inc.
All rights reserved
Page 1
LOW COST - HIGH PERFORMANCE