PSN0210A
PHASE LOCKED LOOP
14118 Stowe Drive, Suite B | Poway, CA 92064
TEL: (858) 621-2700 | FAX: (858) 486-1927
Rev A2
PHASE NOISE (1 Hz BW, typical)
FEATURES
• Frequency Range:
• Step Size:
200 -
100
230 MHz
KHz
•
- Style Package
PLL
APPLICATIONS
• Telecommunications
• Satellite
Telemetry
•
VALUE
200 - 230
UNITS
MHz
PERFORMANCE SPECIFICATIONS
Frequency Range
-105
dBc/Hz
dBc
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
-10
-65
dBc
Power Output
4±3
50
dBm
Load Impedance
Step Size
100
1000
kHz
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
1
mSec
mSec
°C
5
-40 to +85
Operating Temperature Range
Package Style
PLL
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Vdc
mA
Supply Current (Icc, typ.)
20
All specifications are typical unless otherwise noted and subject to change without notice.
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
<40 MHz
Prescaler: 8
Frequency Synthesizer: National Semiconductor - LMX2306
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