PSN1720A
9939 Via Pasar • San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
0
-40
-80
FEATURES
-120
-
• Frequency Range: 1690
• Step Size:
- Style Package
1760
MHz
50
KHz
-160
-200
•
PLL
APPLICATIONS
• Telecommunications
• Satellite
100 Hz
1 kHz
10 kHz
100 kHz
Telemetry
•
VALUE
1690 - 1760
UNITS
MHz
PERFORMANCE SPECIFICATIONS
Frequency Range
-104
dBc/Hz
dBc
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
-15
-70
dBc
Power Output
3.5±2.5
50
dBm
Load Impedance
Step Size
Ω
50
KHz
1000
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
µΑ
mSec
4
6
mSec
°C
-40 to 85
Operating Temperature Range
Package Style
PLL
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
5
Vdc
mA
Supply Current (Icc, typ.)
33
All specifications are typical unless otherwise noted and subject to change without notice.
APPLICATION NOTES
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<fosc<40 MHz
Frequency Synthesizer: National Semiconductor - LMX2326
© Z-Communications, Inc.
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