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Z86C93 参数 Datasheet PDF下载

Z86C93图片预览
型号: Z86C93
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS Z8 MULT / DIV微控制器 [CMOS Z8 MULT/DIV MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 13 页 / 176 K
品牌: ZILOG [ ZILOG, INC. ]
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Z86C93
CPS DC-4020-12
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86C93
CMOS Z8
®
M
ULT
/D
IV
M
ICROCONTROLLER
GENERAL DESCRIPTION
The Z86C93 is a CMOS ROMless Z8 microcontroller en-
hanced with a hardwired 16-bit x 16-bit multiplier,
32-bit/16-bit divider, and three 16-bit counter timers (see
Functional Block Diagram). A capture register and a fast
decrement mode are also provided. It is offered in 40-pin
PDIP, 44-pin PLCC, 44-pin QFP, and 48-pin VQFP pack-
ages. The Z86C93 is functionally compatible with the
Z86C91, yet it offers a more powerful mathematical capa-
bility. In the PDIP package, the Z86C93 is fully pin compat-
ible with the Z86C91. In the PLCC package, the Z86C93 is
also pin compatible to the Z86C91, with the addition of four
signals (SCLK, /IACK, /SYNC, and /WAIT). The /WAIT
signal is only available on the 25 MHz and 33 MHz devices.
The Z86C93 provides up to 16 output address lines permit-
ting an address space of up to 64 Kbytes of data and
program memory each. Eight address outputs (AD7-AD0)
are provided by a multiplexed, 8-bit, Address/Data bus.
The remaining 8 bits can be provided by the software
configuration of Port 0 to output address bits A15-A8.
There are 256 registers located on chip and organized as
236 general-purpose registers, 16 control and status reg-
isters, one reserved register, and up to three I/O port
registers. The register file can be divided into 16 groups of
16 working registers each. Configuration of the registers in
this manner allows the use of short format instructions; in
addition, any of the individual registers can be accessed
directly. There are an additional 17 registers implemented
in the Expanded Register File in Banks D and E. Two of the
registers may be used as general-purpose registers, while
15 registers supply the data and control functions for the
Multiply/Divide Unit and additional Counter/Timer blocks.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
DC-4020-12
(2-16-94)
1