Z8 Encore! XP® 4K Series
Product Specification
37
Table 15. Port Alternate Function Mapping (Continued)(Non 8-Pin Parts)
Alternate
Function Set
Register AFS1
Port
Pin
Mnemonic
Alternate Function Description
PB0
Reserved
AFS1[0]: 0
AFS1[0]: 1
AFS1[1]: 0
AFS1[1]: 1
AFS1[2]: 0
AFS1[2]: 1
AFS1[3]: 0
AFS1[3]: 1
AFS1[4]: 0
AFS1[4]: 1
AFS1[5]: 0
AFS1[5]: 1
AFS1[6]: 0
AFS1[6]: 1
AFS1[7]: 0
AFS1[7]: 1
Port B
ANA0/AMPOUT ADC Analog Input/LPO Output
Reserved
PB1
PB2
PB3
PB4
PB5
PB6
PB7
ANA1/AMPINN
Reserved
ANA2/AMPINP
CLKIN
ADC Analog Input/LPO Input (N)
ADC Analog Input/LPO Input (P)
External Clock Input
ANA3
ADC Analog Input
Reserved
ANA7
ADC Analog Input
Reserved
VREF*
ADC Voltage Reference
Reserved
Reserved
Reserved
Reserved
Note: Because there are at most two choices of alternate function for any pin of Port B, the Alternate
Function Set register AFS2 is not used to select the function. Also, alternate function selection as
described in Port A–D Alternate Function Sub-Registers on page 42 must also be enabled.
* VREF is available on PB5 in 28-pin products only.
PS022815-0206
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
