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Z8F022APH020SC 参数 Datasheet PDF下载

Z8F022APH020SC图片预览
型号: Z8F022APH020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采! XP -R 4K系列高性能8位微控制器 [Z8 Encore! XP-R 4K Series High-Performance 8-Bit Microcontrollers]
分类和应用: 微控制器外围集成电路光电二极管时钟
文件页数/大小: 276 页 / 3422 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® 4K Series  
Product Specification  
28  
Table 12. Reset Status Register (RSTSTAT)  
BITS  
7
6
5
4
3
2
1
0
POR  
STOP  
WDT  
EXT  
Reserved  
LVD  
FIELD  
RESET  
R/W  
See descriptions below  
0
0
0
0
0
R
R
R
R
R
R
R
R
FF0H  
ADDR  
Reset or STOP Mode Recovery Event  
Power-On Reset  
POR  
STOP  
WDT  
EXT  
1
0
0
1
1
0
0
0
0
0
0
0
1
1
0
0
1
0
0
0
1
0
1
0
0
0
0
0
Reset using RESET pin assertion  
Reset using Watch-Dog Timer time-out  
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)  
Reset from STOP Mode using DBG Pin driven Low  
STOP Mode Recovery using GPIO pin transition  
STOP Mode Recovery using Watch-Dog Timer time-out  
POR—Power-On Reset Indicator  
If this bit is set to 1, a Power-On Reset event occurred. This bit is reset to 0 if a WDT time-  
out or STOP Mode Recovery occurs. This bit is also reset to 0 when the register is read.  
STOP—STOP Mode Recovery Indicator  
If this bit is set to 1, a STOP Mode Recovery occurred. If the STOPand WDTbits are both  
set to 1, the STOP Mode Recovery occurred because of a WDT time-out. If the STOPbit  
is 1 and the WDTbit is 0, the STOP Mode Recovery was not caused by a WDT time-out.  
This bit is reset by a Power-On Reset or a WDT time-out that occurred while not in STOP  
mode. Reading this register also resets this bit.  
WDT—Watch-Dog Timer Time-Out Indicator  
If this bit is set to 1, a WDT time-out occurred. A Power-On Reset resets this pin. A STOP  
Mode Recovery from a change in an input pin also resets this bit. Reading this register  
resets this bit. This read must occur before clearing the WDT interrupt.  
EXT—External Reset Indicator  
If this bit is set to 1, a Reset initiated by the external RESET pin occurred. A Power-On  
Reset or a STOP Mode Recovery from a change in an input pin resets this bit. Reading this  
register resets this bit.  
Reserved—Must be 0.  
LVD—Low Voltage Detection Indicator  
If this bit is set to 1 the current state of the supply voltage is below the low voltage detec-  
tion threshold. This value is not latched but is a real-time indicator of the supply voltage  
level.  
PS022815-0206  
Reset, STOP Mode Recovery and Low Voltage Detection