Z8 Encore! XP® 4K Series
Product Specification
xiv
Figure 25. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface
(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Figure 26. OCD Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Figure 27. Recommended 20 MHz Crystal Oscillator Configuration . . . . . . . . 186
Figure 28. Connecting the On-Chip Oscillator to an External RC Network . . . 188
Figure 29. Typical RC Oscillator Frequency as a Function of the External Capaci-
tance with a 45KOhm Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
Figure 30. Opcode Map Cell Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Figure 31. First Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Figure 32. Second Opcode Map after 1FH . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
Figure 33. Typical Active Mode IDD Versus System Clock Frequency . . . . . . 216
Figure 34. Port Input Sample Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Figure 35. GPIO Port Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Figure 36. On-Chip Debugger Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Figure 37. UART Timing With CTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Figure 38. UART Timing Without CTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Figure 39. 8-Pin Plastic Dual Inline Package (PDIP) . . . . . . . . . . . . . . . . . . . 230
Figure 40. 8-Pin Small Outline Integrated Circuit Package (SOIC) . . . . . . . . 231
Figure 41. 8-Pin Quad Flat No-Lead Package (QFN)/ MLF-S . . . . . . . . . . . . 232
Figure 42. 20-Pin Plastic Dual Inline Package (PDIP) . . . . . . . . . . . . . . . . . . 233
Figure 43. 20-Pin Small Outline Integrated Circuit Package (SOIC) . . . . . . . . 234
Figure 44. 20-Pin Small Shrink Outline Package (SSOP) . . . . . . . . . . . . . . . . 235
Figure 45. 28-Pin Plastic Dual Inline Package (PDIP) . . . . . . . . . . . . . . . . . . 236
Figure 46. 28-Pin Small Outline Integrated Circuit Package (SOIC) . . . . . . . . 237
Figure 47. 28-Pin Small Shrink Outline Package (SSOP) . . . . . . . . . . . . . . . . 238
PS022815-0206
List of Figures
ZILOG [ ZILOG, INC. ]
