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Z8F082ASH020SC 参数 Datasheet PDF下载

Z8F082ASH020SC图片预览
型号: Z8F082ASH020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采XP -R F08xA系列与扩展外设 [Z8 Encore XP-R F08xA Series with eXtended Peripherals]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 244 页 / 2750 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® F08xA Series  
Product Specification  
117  
ADC Control Register Definitions  
ADC Control Register 0  
The ADC Control register selects the analog input channel and initiates the analog-to-dig-  
ital conversion.  
Table 70. ADC Control Register 0 (ADCCTL0)  
7
6
5
4
CONT  
0
3
2
1
0
BITS  
CEN  
0
REFSELL REFEXT  
ANAIN[3:0]  
FIELD  
RESET  
R/W  
0
0
0
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
F70H  
ADDR  
CEN—Conversion Enable  
0 = Conversion is complete. Writing a 0 produces no effect. The ADC automatically clears  
this bit to 0 when a conversion is complete.  
1 = Begin conversion. Writing a 1 to this bit starts a conversion. If a conversion is already  
in progress, the conversion restarts. This bit remains 1 until the conversion is complete.  
REFSELL—Voltage Reference Level Select Low Bit; in conjunction with the High bit  
(REFSELH) in ADC Control/Status Register 1, this determines the level of the internal volt-  
age reference; the following details the effects of {REFSELH, REFSELL}; note that this  
reference is independent of the Comparator reference  
00= Internal Reference Disabled, reference comes from external pin  
01= Internal Reference set to 1.0 V  
10= Internal Reference set to 2.0 V (default)  
11= Reserved  
REFEXT - External Reference Select  
0 = External reference buffer is disabled; Vref pin is available for GPIO functions  
1 = The internal ADC reference is buffered and connected to the Vref pin  
CONT  
0 = Single-shot conversion. ADC data is output once at completion of the 5129 system  
clock cycles  
1 = Continuous conversion. ADC data updated every 256 system clock cycles  
ANAIN[3:0]—Analog Input Select  
These bits select the analog input for conversion. Not all Port pins in this list are available  
in all packages for the Z8 Encore! XP® F08xA Series. Refer to the chapter “Pin Descrip-  
tion” on page 7 for information regarding the Port pins available with each package style.  
Do not enable unavailable analog inputs. Usage of these bits changes depending on the  
buffer mode selected in ADC Control/Status Register 1.  
PS024705-0405  
P R E L I M I N A R Y  
Analog-to-Digital Converter