ZLP12840 OTP MCU
Product Specification
1
Architectural Overview
The ZLP12840 OTP MCU is a member of the Crimzon family of infrared microcontrol-
lers. It provides a directly-compatible code upgrade path to other Crimzon MCUs,
offers a robust learning function, and features up to 128 KB one-time-programmable
(OTP) read-only memory (ROM) and 1004 bytes of general-purpose random-access mem-
ory (RAM). Two timers allow the generation of complex signals while performing other
counting operations. A UART allows the ZLP12840 MCU to be a slave/master database
chip. When the UART is not in use, the Baud Rate Generator can be used as a third timer.
Enhanced stop-mode recovery (SMR) features allow the ZLP12840 MCU to awaken from
STOP mode on any change of logic, and on any combination of the 12 SMR inputs. The
SMR source can also be used as an interrupt source.
Many high-end remote control units offer a learning function. Simply stated, a learning
function allows a replacement remote unit to learn most infrared signals from the original
remote unit and regenerate the signal. However, the amplifying circuits of many learning
remotes are expensive, are not tuned well, and result in frustrated users. ZiLOGs
ZLP12840 MCU is the first chip dedicated to solving this problem because it offers a
built-in tuned amplification circuit in a wide range of positions and battery voltages. The
only external component required is a photodiode.
The ZLP12840 MCU greatly reduces system cost, yet improves learning function reliabil-
ity. Best of all, however, will be the user experience promised by ZiLOGs superior learn-
ing function. With all new features, the ZLP12840 MCU is excellent for infrared remote
control and other MCU applications.
Features
Table 1
lists the memory, I/O, and power features of the ZLP12840 one-time-programma-
ble microcontroller. Additional features are listed below the table.
Table 1. ZLP12840 OTP MCU Features
Device
ZLP12840 MCU
OTP ROM (KB)
32, 64, 96, 128
RAM* (Bytes)
1004
I/O Lines
24 or 16
Voltage
Range
2.03.6 V
Note: *General-purpose registers implemented as random-access memory.
PS024406-0106
P R E L I M I N A R Y
Architectural Overview