ZMD31020
Sensor Signal Conditioner
Datasheet
Address locations &H07 and &H08 contain a low-side resp. high-side scale limit value for the corrected sensor
signal. Lower resp. -higher corrected signal values are clamped arithmetically to these limits by the CMC. Both
the low and high-side scale limits can be adjusted with a resolution of 12 bits. The 12 bit limit value must be
programmed into the least significant portion of either address. The 4 most significant bit locations of either
address are don't care bits and may be programmed freely.
Address locations &H0A and &H0B are available for customer-specific identification words, e.g. for traceability
purposes.
The contents of EEPROM addresses &H00 through &H09 are loaded into the RAM register block of the CMC
upon power-on. The configuration bits are routed from the configuration register to the various device functions
to be set up, see chapter 6.1.
Erasing and programming of the various EEPROM address locations during calibration requires programming
pulses of about 12V amplitude and about 10ms pulse width (see section 3.3.5). Further programming details are
to find in the ZMD31020 Functional Description.
Since a calibration is typically performed only once in a sensor's lifetime, no overhead chip-area for a charge-
pump has been spent. Thus the programming pulse has to be generated off-chip, and applied at the VPP
pin/pad. During normal operation mode the VPP pin/pad must be left open.
Note:
An on-chip switch short-circuits VPP to VDD in normal operation mode; the switch is opened to release
the VPP pin/pad for programming.)
2.8
Sensor Signal Correction Method and Sequence
In normal operation mode (regular sensing operation) the CMC runs a cyclic program which will output a
corrected 12-bit sensor value about every 10ms.
Within this cycle the CMC stages measurement of the ‚raw‘ sensor signal with 12 bits resolution, preceded by
measurement of temperature in 10 bits, and calculates a corrected sensor output value. Calculation is based on
a correction formula to which the 'raw' sensor signal and temperature as measured are applied in first and
second order terms - along with the 7 calibration parameters.
The measurement procedure of the 'raw' sensor signal and of temperature as well as the correction formula are
described in all details in the ZMD31020 Functional description
2.9
Digital I
2
C Interface
2
The 2-wire I C interface encompasses a clock line input SCL and a bi-directional data line SDA.
2.9.1
Digital Corrected Sensor Signal Output and I/O for Calibration and Device Test
2
During normal operation mode (regular sensing operation) the I C interface will output the corrected sensor
signal (12 bits) digitally and serially. During calibration the interface is input for the configuration word, output for
the 'raw' non-corrected sensor signal as well as for temperature, and finally again input for the calculated
calibration parameters as well as the scale limit values and possibly customer-specific identifiers. As a third
option, the interface is used to input digital vectors during device test, e.g. to exercise the output DAC, see
section 2.10.
2.9.2
2
Data Communication Specifics
An I C bus is controlled by a master device, which generates the clock, controls the bus access, and generates
START and STOP conditions. ZMD31020 is designed to work as a slave - thus it will only respond to requests
from a master device. Obviously a typical master device during regular sensing operation is a connected
electronic controller unit requesting sensor data. (During calibration a connected PC or computer will be the
master. During device test the ATE system will be the master.)
Copyright © 2004, ZMD AG, Rev. 1.6, 2005-05-19
8/19
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior
written consent of the copyright owner. The Information furnished in this publication is preliminary and subject to changes without notice.
ZMD [ Zentrum Mikroelektronik Dresden AG ]
