If the RTC is used, Vbat must be connected to either pin V3 or an independent power supply (external battery). Otherwise, Vbat should be tied to the ground (Vss). No provision is made in the LPC2131/2132/2138 to retain RTC status upon the Vbat power loss, or to maintain time incrementation if the clock source is lost, interrupted, or altered. Since the RTC operates using one of two available clocks (the VPB clock (pclk) or the 32 kHz signal coming from the RTCX1-2 pins), any interruption of the selected clock will cause the time to drift away from the time value it would have provided otherwise. The variance could be to actual clock time if the RTC was initialized to that, or simply an error in elapsed time since the RTC was activated. While the signal from RTCX1-2 pins can be used to supply the RTC clock at anytime, selecting the pclk as the RTC clock and entering the Power Down mode will cause a lapse in the time update. Also, feeding the RTC with the pclk and altering this timebase during system operation (by reconfiguring the PLL, the VPB divider, or the RTC prescaler) will result in some form of accumulated time error. Accumulated time errors may occur in case RTC clock source is switched between the pclk to the RTCX pins, too. Once the 32 kHz signal from RTCX1-2 pins is selected as a clock source, the RTC can operate completely without the presence of the VPB clock (pclk). Therefore, power sensitive applications (i.e. battery powered application) utilizing the RTC will reduce the power consumption by using the signal from RTCX1-2 pins, and writing a 0 into the PCRTC bit in the PCONP power control register (see "Power Control" section in the "System Control Block" chapter). Table 162: Alarm Registers Address Name Size Description Access 0xE0024060 ALSEC 6 Alarm value for Seconds R/W 0xE0024064 ALMIN 6 Alarm value for Minutes R/W 0xE0024068 ALHOUR 5 Alarm value for Hours R/W 0xE002406C ALDOM 5 Alarm value for Day of Month R/W 0xE0024070 ALDOW 3 Alarm value for Day of Week R/W 0xE0024074 ALDOY 9 Alarm value for Day of Year R/W 0xE0024078 ALMON 4 Alarm value for Months R/W 0xE002407C ALYEAR 12 Alarm value for Years R/W Real Time Clock 216 November 22, 2004 Philips Semiconductors Preliminary User Manual LPC2131/2132/2138 ARM-based Microcontroller REFERENCE CLOCK DIVIDER (PRESCALER) The reference clock divider (hereafter referred to as the Prescaler) allows generation of a 32.768 kHz reference clock from any peripheral clock frequency greater than or equal to 65.536 kHz (2 x 32.768 kHz). This permits the RTC to always run at the proper rate regardless of the peripheral clock rate. Basically, the Prescaler divides the peripheral clock (pclk) by a value which contains both an integer portion and a fractional portion. The result is not a continuous output at a constant frequency, some clock periods will be one pclk longer than others. However, the overall result can always be 32,768 counts per second. The reference clock divider consists of a 13-bit integer counter and a 15-bit fractional counter. The reasons for these counter sizes are as follows: 1. For frequencies that are expected to be supported by the LPC2131/2132/2138, a 13-bit integer counter is required. This can be calculated as 160 MHz divided by 32,768 minus 1 = 4881 with a remainder of 26,624. Thirteen bits are needed to hold the value 4881, but actually supports frequencies up to 268.4 MHz (32,768 x 8192). 2. The remainder value could be as large as 32,767, which requires 15 bits.
作者：agnd 2005-1-29 0:29:00 |
