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ADC31JB68RTAT北京军工IC国宇航芯黄小姐优势订货

时间:2018-9-7,阅读:165,发布企业:深圳市国宇航芯科技有限公司, 资讯类别:会员资讯
公司:
深圳市国宇航芯科技有限公司
联系人:
黄云艳
手机:
13632767652
电话:
086-0755-84829291
传真:
086-0755-82286633
QQ:
956145708 和我即时交谈
地址:
龙华区民治光浩国际中心一期16F
摘要:ADC31JB68RTAT

ADC31JB68RTAT订货13632767652黄小姐微信同号

The ADC31JB68 is a low power, wide bandwidth 16-bit 500 MSPS analog-to-digital converter (ADC). The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. It is designed to sample input signals of up to 1.3 GHz.

The ADC31JB68 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. On-chip dither provides an very clean noise floor. Embedded foreground and background calibration ensures consistent performance over the temperature range and minimizes part to part variation.

It supports the JESD204B serial interface with data rates up to 5 Gbps on each of 2 lanes, enabling high system integration density.

The device comes in a 40-pin QFN (6 × 6 mm) package.

Key Features

  • Single Channel

  • 16-Bit Resolution

  • Maximum Clock Rate: 500 Msps

  • Small 40-Pin QFN Package (6 × 6 mm)

  • Input Buffer Input Bandwidth (3 dB): 1300 MHz

  • Aperture Jitter: 80 fs

  • On Chip Clock Divider: /1, /2, /4

  • On Chip Dither

  • Consistent Dynamic Performance Using Foreground and Background Calibration

  • Input Amplitude and Phase Adjustment

  • Input Full Scale: 1.7 Vpp

  • Power Supplies: 1.2/1.8/3 V

  • JESD204B Interface

    • Subclass 1 Compliant

    • 2 Lanes at 5 Gbps


  • Support for Multi-chip Synchronization

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