LM2640
Pin Description
(Refer to Typical Application Circuits)
Pin
#
1
2
3
4
5
6
7
8
9
10
CSH2
FB2
COMP2
SS2
ON/OFF2
SD
SYNC
GND
REF
2NDFB/FPWM
Name
Function
The sense point for the positive side of the voltage across the current sense resistor (R13)
placed in series with output
#2.
The regulated output voltage appearing at output
#2
is sensed using this pin by connecting it to
the center of the output resistive divider (R15 and R16).
An R-C network made up of R11, C10, and C12 is connected to this pin which provides loop
compensation for regulated output
#2.
This provides programmable soft-start for the
#2
output along with capacitor C15.
This pin turns off only output
#2.
The part can be put into “sleep” mode using this pin, where both outputs are off and the internal
chip functions are shut down.
The internal oscillator may be synchronized to an external clock via this pin.
Connect this pin to circuit Signal Ground.
Internal 2.5V reference voltage. This voltage is turned off by the SD pin, but remains on if either
or both ON/OFF pins are pulled low, which turns off the regulated output(s).
A 12V supply can be generated using an auxiliary winding on the 5V output inductor. Feedback
to control this 12V output is brought in through this pin. If the 12V supply is not required, this pin
can also force the chip to operate at fixed frequency at light loads by pulling the pin low (this is
the “forced-PWM” mode of operation). This will prevent the converter from operating in
pulse-skipping mode.
This pin turns off only output
#1.
This provides programmable soft-start for the
#1
output along with capacitor C3.
An R-C network made up of R6, C5, and C7 is connected to this pin which provides loop
compensation for regulated output
#1.
The regulated output voltage appearing at output
#1
is sensed using this pin by connecting it to
the center of the output resistive divider (R1 and R2).
The sense point for the positive side of the voltage across the current sense resistor (R4) placed
in series with output
#1.
The drive for the gate of the high-side switching FET used for output
#1.
This is the switching output drive point of the two power FETs which produce output
#1.
The bootstrap capacitor (C8) for output
#1
is returned to this point.
The drive for the gate of the low-side switching FET (synchronous rectifier) used for output
#1.
Connect this pin to circuit Power Ground.
The sense point for the negative side of the voltage across the current sense resistor (R4)
placed in series with output
#1.
This pin provides a low-current (50 mA max) 5V output. This output is always on, and can not be
turned off by either the SD or ON/OFF pins.
This is the connection for the main input power.
The drive for the gate of the low-side switching FET (synchronous rectifier) used for output
#2.
The bootstrap capacitor (C9) for output
#2
is returned to this point.
This is the switching output drive point of the two power FETs which produce output
#2.
The drive for the gate of the high-side switching FET used for output
#2.
The sense point for the negative side of the voltage across the current sense resistor (R13)
placed in series with output
#2.
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ON/OFF1
SS1
COMP1
FB1
CSH1
HDRV1
SW1
CBOOT1
LDRV1
PGND
CSL1
LIN
IN
LDRV2
CBOOT2
SW2
HDRV2
CSL2
www.national.com
2
ETC [ ETC ]
