LIST OF FIGURES (2/3)
Figure No.
2-39
2-40
2-41
2-42
2-43
2-44
2-45
2-46
2-47
2-48
2-49
2-50
2-51
2-52
2-53
2-54
2-55
2-56
2-57
Title
Page
Read Operation of SST29LE010-150.............................................................................................................46
Write Operation of SST29LE010-150 .............................................................................................................47
Settings in Chip Area Select Control Register 0 (CSC0) ................................................................................49
Settings in Bus Cycle Type Configuration Register 0 (BCT0).........................................................................50
Settings in Bus Size Configuration Register (BSC) ........................................................................................50
Settings in Bus Cycle Control Register (BCC) ................................................................................................50
Settings in DRAM Configuration Register 1 (SCR1).......................................................................................51
Settings in Refresh Control Register 1 (RFS1) ...............................................................................................51
Settings in Refresh Wait Control Register (RWC) ..........................................................................................52
Example of HM5164165FL-5 Connection Circuit............................................................................................53
Read Operation of HM5164165FL-5 ..............................................................................................................53
Write Operation of HM5164165FL-5...............................................................................................................54
Settings in Bus Cycle Type Configuration Register 0 (BCT0).........................................................................56
Settings in Bus Size Configuration Register (BSC) ........................................................................................56
Settings in Bus Cycle Control Register (BCC) ................................................................................................56
Settings in SDRAM Configuration Register 3 (SCR3) ....................................................................................57
Settings in Refresh Control Register 3 (RFS3) ...............................................................................................57
Example of
µ
PD4564163G5-A10 Connection Circuit .....................................................................................57
Read Operation of
µ
PD4564163G5-A10 ........................................................................................................58
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
µ
PD434016ALE-12 Connection Circuit Example ...........................................................................................61
Read Operation of
µ
PD434016ALE-12 (16-Bit Access) .................................................................................62
Write Operation of
µ
PD434016ALE-12 (16-Bit Access) .................................................................................63
Example of
µ
PD4991A Connection Circuit .....................................................................................................67
Read Operation of
µ
PD4991A........................................................................................................................68
Write Operation of
µ
PD4991A ........................................................................................................................68
Example of
µ
PD63310 Connection Circuit .....................................................................................................70
Circuit Configuration of Wait Control Block.....................................................................................................71
Read Operation of
µ
PD63310 ........................................................................................................................72
Write Operation of
µ
PD63310 ........................................................................................................................72
Example of IDT7007S20 Connection Circuit ..................................................................................................74
Circuit Configuration of WAIT Control Block...................................................................................................75
Read Operation of IDT7007S20 (When BUSY
L
Pin Is Active)........................................................................75
Example of HM5164165FL-5 (×4) Connection Circuit ....................................................................................78
Detailed View of CAS Control Block ...............................................................................................................79
Connection with External Refresh Unit Using HLDRQ Signal ........................................................................81
Circuit Configuration of Refresh Control Block ...............................................................................................82
Refresh Control Timing...................................................................................................................................83
Application Note U15179EJ2V0AN
13
ETC [ ETC ]
