KT0803K
I
2
C Compatible 2-Wire Serial Interface
General Descriptions
The serial interface consists of a serial controller and registers. An internal address decoder transfers the
content of the data into appropriate registers.
Please note that the I2C address is 0x 0111110 the same as
in KT0803. Neither software nor hardware change is needed if KT0803K is used to replace KT0803.
Both the write and read operations are supported according to the following protocol:
Write Operations:
BYTE WRITE:
The write operation is accomplished via a 3-byte sequence:
Serial address with write command
Register address
Register data
A write operation requires an 8-bit register address following the device address word and acknowledgment.
Upon receipt of this address, the KT0803K will again respond with a “0” and then clock in the 8-bit
register data. Following receipt of the 8-bit register data, the KT0803K will output a “0” and the addressing
device, such as a microcontroller, must terminate the write sequence with a stop condition (see Figure 3).
Read Operations:
RANDOM READ:
The read operation is accomplished via a 4-byte sequence:
Serial address with write command
Register address
Serial address with read command
Register data
Once the device address and register address are clocked in and acknowledged by the KT0803K, the
microcontroller must generate another start condition. The microcontroller now initiates a current address
read by sending a device address with the read/write select bit high. The KT0803K acknowledges the
device address and serially clocks out the register data. The microcontroller does not respond with a “0” but
does generate a following stop condition (see Figure 3).
RANDOM REGISTER WRITE PROCEDURE
S 0 1 1
1
1 1 0 WA
7 bit address
START condition
A
data
Acknowledge
AP
STOP condition
Acknowledge
register address
Acknowledge
WRITE command
RANDOM REGISTER READ PROCEDURE
S 0 1 1
1
1 1 0 WA
7 bit address
START condition
AS 0 1 1 1 1 1 0 R A
7 bit address
Acknowledge
AP
data
Acknowledge
READ condition
NO Acknowledge
STOP condition
Figure 3: Serial Interface Protocol
CURRENT ADDRESS READ:
The internal data register address counter maintains the last address
DS-1896P-03
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register address
Acknowledge
WRITE command
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