KT0803K
accessed during the last read or write operation, incremented by one. This address stays valid between
operations as long as the chip power is maintained.
Once the device address with the read/write select bit set to “1” is clocked in and acknowledged by the
KT0803K, the current address data word is serially clocked out. The microcontroller does not respond with
an input “0” but does generate a following stop condition (see Figure 4).
CURRENT REGISTER READ PROCEDURE
S 0 1 1
1
1 1 0 R A
7 bit address
START condition
AP
STOP condition
NO Acknowledge
data
Acknowledge
READ command
Figure 4: Serial Interface Protocol
Note:
The serial controller supports slave mode only. Any register can be addressed randomly.
The address of the slave in the first 7 bits and the 8th bit tells whether the master is receiving data from the
slave or transmitting data to the slave. The I
2
C write address is 0x6C and the read address is 0x6D.
Slave Mode Protocol
With reference to the clocking scheme shown in Figure 5, the serial interface operates in the following
manner:
Figure 5: Serial Interface Slave Mode Protocol
CLOCK and DATA TRANSITIONS:
The SDA pin is normally pulled high with an external device. Data
on the SDA pin may change only during SCL low time periods (see Figure 6). Data changes during SCL
high periods will indicate a start or stop condition as defined below.
START CONDITION:
A high-to-low transition of SDA with SCL high is a start condition which must
precede any other command (see Figure 7).
STOP CONDITION:
A low-to-high transition of SDA with SCL high is a stop condition. After a read
sequence, the stop command will place the KT0803K in a standby power mode (see Figure 7).
ACKNOWLEDGE:
All addresses and data words are serially transmitted to and from the KT0803K in 8-
bit words. The KT0803K sends a “0” to acknowledge that it has received each word. This happens during
the ninth clock cycle (see Figure 8).
DS-1896P-03
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