3650IC贸易商引脚图技术参数全新原装-中国IC网-芯三七

®

3650

3652

Optically-Coupled Linear

ISOLATION AMPLIFIERS

FEATURES

APPLICATIONS

● BALANCED INPUT

● INDUSTRIAL PROCESS CONTROL

● LARGE COMMON-MODE VOLTAGES:

±2000V Continuous

● DATA ACQUISITION

● INTERFACE ELEMENT

● BIOMEDICAL MEASUREMENTS

● PATIENT MONITORING

● TEST EQUIPMENT

140dB Rejection

● ULTRA LOW LEAKAGE:

0.35µA max at 240V/60Hz

1.8pF Leakage Capacitance

● CURRENT SHUNT MEASUREMENT

● GROUND-LOOP ELIMINATION

● SCR CONTROLS

● EXCELLENT GAIN ACCURACY:

0.05% Linearity

0.05%/1000 Hrs Stability

● WIDE BANDWIDTH:

15kHz ±3dB

1.2V/µs Slew Rate

DESCRIPTION

The 3650 and 3652 are optically coupled integrated

circuit isolation amplifiers. Prior to their introduction

commercially available isolation amplifiers had been

modular or rack mounted devices using transformer

coupled modulation demodulation techniques.

Compared to these earlier isolation amplifiers, the

3650 and 3652 have the advantage of smaller size,

lower cost, wider bandwidth and integrated circuit

reliability. Also, because they use a DC analog modu-

lation technique as opposed to a carrier-type tech-

nique, they avoid the problems of electro-

magnetic interference (both transmitted and received)

that most of the modular isolation amplifiers exhibit.

1.6MΩ

6

R_G1

8

9

4

11

10

A₁

Light

Flux

23

R_IN

A₃

A₄

Coupling

R_G2

3

1

A₁

1.6MΩ

3652 Only

Common to 3650 and 3652

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

FAXLine: (800) 548-6133 (US/Canada Only)

• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP

•

Telex: 066-6491

•

FAX: (520) 889-1510

•

Immediate Product Info: (800) 548-6132

®

Printed in U.S.A. August, 1997

^PDS1^-342L

3650/52

SBOS129

SPECIFICATIONS

At +25°C and ±15VDC supply voltages, unless otherwise specified.

PRODUCT

3650MG, HG⁽¹⁾

3650JG

3650KG

3652MG, HG⁽¹⁾

3652JG

ISOLATION

Isolation Voltage

Rated Continuous, min

Tested Voltage, min, 10s Duration

2000Vp or VDC

5000Vp

Isolation Mode Rejection, G = 10

DC

60Hz, 5000Ω Source Unbalance

Leakage Current, 240V/60Hz

Isolation Impedance

Capacitance

140dB

120dB

0.35µA, max

1.8pF

10¹²Ω

Resistance

GAIN

Gain Equation

for Current Sources

G₁= 10⁶V/Amp

10⁶

R_G1+ R_G2+ R_IN

G₁= 1.0057 x 10⁶V/Amp⁽²⁾

10⁶

for Voltage Sources

G_V1 =

V/V

R_G1+ R_G2+ R_IN+ R_O

Input Resistance, R_IN, max

Buffer Output Impedance, R_O

25Ω

Not Applicable

25Ω

90Ω ±30Ω

Gain Equation Error, max⁽³⁾

Gain Nonlinearity

1.5%

0.5%

1.5%⁽⁴⁾

0.5%⁽⁴⁾

±0.05% typ ±0.2% max ±0.03% typ ±0.1% max ±0.02% typ ±0.05% max ±0.05% typ ±0.2% max ±0.05% typ ±0.1% max

Gain vs Temperature

Gain vs Time

300ppm/°C

100ppm/°C

±0.05%/1000hrs

50ppm/°C

300ppm/°C

200ppm/°C

±0.05%/1000hrs

Frequency Response

Slew Rate

0.7V/µs min, 1.2V/µs typ

±3dB Frequency

Settling Time

to ±0.01%

15kHz

400µs

200µs

to ±0.1%

INPUT STAGE⁽⁵⁾

Input Offset Voltage

at 25°C, max⁽³⁾

vs Temperature, max

vs Supply

±5mV

±25µV/°C

±1mV

±10µV/°C

100µV/V

±0.5mV

±5µV/°C

±5mV

±50µV/°C

±2mV

±25µV/°C

100µV/V

vs Time

50µV/1000hrs

100µV/1000hrs

Input Bias Current

at 25°C

vs Temperature

vs Supply

10nA typ, 40nA max

0.3nA/°C

10pA typ, 50pA max

Doubles Every +10°C

1pA/V

0.2nA/V

Input Offset Current

vs Temperature

vs Supply

10pA

Doubles Every +10°C

1pA/V

Effects Included

In Output Offset

Input Impedance

Differential

Common-Mode

“R_IN” = 25Ω max

10⁹Ω

10¹¹Ω

Input Noise

Voltage, 0.05Hz to 100Hz

10Hz to 10kHz

4µVp-p

4µVrms

8µVp-p

5µVrms

Input Voltage Range

Common-Mode, Linear Operation,

w/o damage, at +, –

at +I, –I

±(|V| –5)V

±V

Not Applicable⁽⁶⁾

±(|V| –5)

±V

±300V for 10ms⁽⁷⁾

±3000V for 10ms⁽⁷⁾

at +I_R, –I_R

Differential, w/o damage, at +, –

Differential, w/o damage, at +I, –I

Differential, w/o damage,

at +I_R, –I_R

±V

Not Applicable

±600V for 10ms⁽⁷⁾

Not Applicable

±6000V for 10ms⁽⁷⁾

Common-Mode Rejection, 60Hz

90dB at 60Hz, 5kΩ Imbalance

80dB at 60Hz, 5kΩ Imbalance

Power Supply (Input Stage Only)

Voltage (at “+V” and “–V”)

Current

Quiescent

with ±10V Output⁽⁷⁾

±8V to ±18V

±1.2mA⁽⁸⁾

+6.5mA or –6.5mA, typ

+12mA or –12mA, max

±3mA⁽⁸⁾

+8.5mA or –8.5mA, typ

+16mA, or –16mA, max

®

2

3650/52

SPECIFICATIONS (CONT)

At +25°C and ±15VDC supply voltages, unless otherwise specified.

PRODUCT

3650MG, HG⁽¹⁾

3650JG

3650KG

3652MG, HG⁽¹⁾

3652JG

OUTPUT STAGE

Output Voltage, min

Output Current, min

Output Offset Voltage

at 25°C, max⁽³⁾

vs Temperature, max

vs Supply

±10V

±5mA

±10V

±5mA

±25mV

±900µV/°C

±10mV

±450µV/°C

±500µV/V

±10mV

±300µV/°C

±25mV

±900µV/°C

±10mV

±450µV/°C

±500µV/V

vs Time

±1mV/1000hrs

Output Noise Voltage

0.05Hz to 100Hz

10Hz to 1kHz

50µVp-p

65µVrms

50µVp-p

65µVrms

Power Supply (Output Stage Only)

Voltage (“+V_CC” and “–V_CC”)

Current

±8V to ±18V

Quiescent

with ±5mA Output, max

±2.3mA typ, ±6mA max

±11mA

TEMPERATURE⁽⁹⁾

Specification

Operating

Storage

0°c to +85°C

–40°C to +100°C

–40°C to +125°C

NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following

specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage

at 25°C, max: ±10mV; vs temperature max: ±100µV/°C; (c) Output offset voltage at 25°C, max; ±50mV; vs temperature max; ±1.8mV/°C. (2) If used as 3650, see

Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e., ±1 or ±I_Rpins). (5) Input

stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating.

(8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt < 1°C/minute below

0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range.

PACKAGE INFORMATION

PIN CONFIGURATIONS

PACKAGE DRAWING

NUMBER⁽¹⁾

13

14

PRODUCT

PACKAGE

3650

3652

32-Pin DIP

77

–V

26

20

11

+V

+

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

+V_CC

Bal

23

17

–V_CC

C

10

12

–

ELECTROSTATIC

DISCHARGE SENSITIVITY

C

Bal

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

15

16

32 29

8

11

13

14

3652

1.6MΩ

6

4

R_O

–V

26

20

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

2

+V

A₁

+

+V_CC

Bal

23

17

–V_CC

C

R_O

2

–

3

1

A₂

C

1.6MΩ

Bal

9

10 12

15

16

32 29

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN

assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject

to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not

authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

®

3

3650/52

TYPICAL PERFORMANCE CURVES

Typical at +25°C and ±15VDC power supplies, unless otherwise noted.

INPUT STAGE SUPPLY CURRENT

vs OUTPUT VOLTAGE

12

ISOLATION LEAKAGE CURRENT

vs ISOLATION VOLTAGE

5

4

3

2

Max at 70°C

10

Max at 25°C

8

Typ at 70°C

Typ at 60Hz

6

Typ at 25°C

4

Typ at DC

3mA

1

0

2

0

1.2mA

–15

–10

–5

Output Voltage (V)

Add 2mA typ, 4mA max for 3652

0

5

10

15

0

1

2

3

4

5

6

Isolation Voltage (kV)

at V–

at V+

NORMALIZED LINEARITY vs TEMPERATURE

REJECTION vs RESISTOR IMBALANCE

1.5

1.4

1.3

1.2

160

120

IMR 60Hz

CMR 60Hz

G =100

G =1

G =100

3650

3652

3650

80

40

1.1

1

G =1

3652

–25

0

25

50

75

100

0.25

0.50

Input Resistor Imbalance

R_G1R_G2

R_G1+ R_G2R_G1+ R_G2

0.75

1

Temperature (°C)

or

DISTORTION vs FREQUENCY

GAIN ERROR vs FREQUENCY

10

3

2

0

V_OUT= +10V

Gain = 1

R_L= 2kΩ

–2

–4

1

Gain = 100

0.3

–6

–8

0.1

3

1

3

10

3

10

30

Frequency (kHz)

®

4

3650/52

TYPICAL PERFORMANCE CURVES (CONT)

Typical at +25°C and ±15VDC power supplies, unless otherwise noted.

OUTPUT VOLTAGE SWING

vs INPUT SUPPLY VOLTAGE

PHASE SHIFT vs FREQUENCY

0

–40

15

10

25°C

70°C

Gain 1 to 100

–80

Typ at 25°C

–120

Guaranteed

Min at Output

Supply ±15V

5

0

–160

–200

0.3

1

3

10

30

5

10

15

20

Frequency (kHz)

Input Supply Voltage (V)

3652 COMMON-MODE AND

3650 COMMON-MODE AND

ISOLATION-MODE REJECTION vs GAIN

140

120

100

140

120

100

60Hz at I pins

60Hz at I_Rpins

DC

60Hz

DC

60Hz at I pins

DC at I or I_Rpins

60Hz

80

60

80

60

Isolation-mode Rejection

Common-mode Rejection

Isolation-mode Rejection

Common-mode Rejection

60Hz at I_Rpins

1

10

100

1000

1

10

100

1000

Gain

OUTPUT VOLTAGE AND GAIN ERROR vs TIME

REJECTION vs FREQUENCY

IMR

CMR

140

120

100

80

14

12

0.5

0.1

70°C

Supply Voltage

70°C

3650

Gain Error

25°C

Change

+V

3652

10

8

0.05

0

60

40

–V

Gain = 100

0.3

0.1

1

3

10

30

100

1k

10k

100K

Frequency (kHz)

Time of Operation (Hours)

®

5

3650/52

NONLINEARITY

DEFINITIONS

ISOLATION-MODE VOLTAGE, V_ISO

Nonlinearity is specified to be the peak deviation from a best

straightline expressed as a percent of peak-to-peak full scale

output (i.e. ±10mV at 20Vp-p ≈ 0.05%).

The isolation-mode voltage is the voltage which appears

across the isolation barrier, i.e., between the input common

and the output common. (See Figure 1.)

Two isolation voltages are given in the electrical specifica-

tions: “rated continuous” and “test voltage”. Since it is

impractical on a production basis to test a “continuous”

voltage (infinite test time is implied), it is a generally

accepted practice to test at a significantly higher voltage for

some reasonable length of time. For the 3650 and 3652, the

“test voltage” is equal to 1000V plus two times the “rated

continuous” voltage. Thus, for a continuous rating of 2000V,

each unit is tested at 5000V.

THEORY OF OPERATION

Prior to the introduction of the 3650 family optical isolation

had not been practical in linear circuits. A single LED and

photodiode combination, while useful in a wide range of

digital isolation applications, has fundamental limitations—

primarily nonlinearity and instability as a function of time

and temperature.

The 3650 and 3652 use a unique technique to overcome the

limitations of the single LED and photodiode isolator.

Figure 2 is an elementary equivalent circuit for the 3650,

which can be used to understand the basic operation without

considering the cluttering details of offset adjustment and

biasing for bipolar operation.

COMMON-MODE VOLTAGE, V_CM

The common-mode voltage is the voltage midway between

the two inputs of the amplifier measured with respect to

input common. It is the algebraic average of the voltage

applied at the amplifiers’ input terminals. In the circuit in

Figure 1, (V₊+ V_–)/2 = V_CM. (NOTE: Many applications

involve a large system “common-mode voltage.” Usually in

such cases the term defined here as “V_CM” is negligible and

the system “common-mode voltage” is applied to the ampli-

fier as “V_ISO” in Figure 1.)

Isolation Barrier

R_K

CR₃

+V

CR₁

CR₂

I₁

I₂

–

+

+V_CC

λ1

λ2

R_G

–

+

I₂

A₂

ISOLATION-MODE REJECTION

A₁

I_IN

V_IN

I₃

The isolation-mode rejection is defined by the equation in

Figure 1. The isolation-mode rejection is not infinite be-

cause there is some leakage across the isolation barrier due

to the isolation resistance and capacitance.

V_OUT

–V

–V_CC

Output Common

Input Common

R_K

V_OUT= V_IN

R_G

Isolation Barrier

R_G1

FIGURE 2. Simplified Equivalent Circuit of Linear Isolator.

+

V+

Two matched photodiodes are used—one in the input (CR₃)

and one in the output stage (CR₂)—to greatly reduce

nonlinearities and time-temperature instabilities. Amplifier

A₁, LED CR₁, and photodiode CR₃are used in a negative

feedback configuration such that I₁= I_INR_G(where R_Gis the

user supplied gain setting resistor). Since CR₂and CR₃are

closely matched, and since they receive equal amounts of

light from the LED CR₁(i.e., λ₁= λ₂), I₂= I₁= I_IN. Amplifier

A₂is connected as a current-to-voltage converter with V_OUT

= I₂R_Kwhere R_Kis an internal 1MΩ scaling resistor. Thus

the overall transfer function is:

R_IN

V_D

R_G2

+

V–

V_OUT

–

I_L

V_CM

C

(Input)

(Output)

V_ISO

System

Ground

10⁶

R_G1+ R_G2+ R_IN

V_CM

V_ISO

V_OUT= V_IN

, (R_Gin Ωs)

V_OUT

=

V_D

+

R_G

CMRR

IMRR

This improved isolator circuit overcomes the primary

limitations of the single LED and photodiode combination.

The transfer function is now virtually independent of any

degradation in the LED output as long as the two photo-

diodes and optics are closely matched⁽¹⁾. Linearity is now a

FIGURE 1. Illustration of Isolation-Mode and Common-

Mode Specifications.

NOTE: (1) The only effect of decreased LED output is a slight decrease in full

scale swing capability. See Typical Performance Curves.

®

6

3650/52

function of the accuracy of the matching and is further

enhanced by the use of negative feedback in the input stage.

Advanced laser trimming techniques are used to further

compensate for residual matching errors.

lower bias currents (50pA) and overvoltage protection. The

+I_Rand –I_Rinputs have a 10ms pulse rating of 6000V

differential and 3000V common-mode (see Definitions for a

discussion of common-mode and isolation-mode voltages.)

The addition of the buffer amplifiers also creates a voltage-

in voltage-out transfer function with the gain set by R_G1and

R_G2.

A model of the 3650 suitable for simple circuit analysis is

shown in Figure 3. The output is a current dependent voltage

source, V_D, whose value depends on the input current. Thus,

the 3650 is a transconductance amplifier with a gain of one

volt per microamp. When voltage sources are used, the input

current is derived by using gain setting resistors in series

with the voltage source (see Installation and Operating

Instructions for details). R_INis the differential input imped-

ance. The common-mode and isolation impedances are very

high and are assumed to be infinite for this model.

INSTALLATION AND

OPERATING INSTRUCTIONS

POWER SUPPLY CONNECTIONS

The power supply connections for the 3650 and 3652 are

shown in Figure 5. When a DC/DC converter is used for

isolated power, it is placed in parallel with the isolation

barrier of the amplifier. This can lower the isolation imped-

ance and degrade the isolation-mode rejection of the overall

circuit. Therefore, a high quality, low leakage DC/DC con-

verter such as the Burr-Brown Model 722 should be used.

+V_CC

26

–V_CC

11

I_IN

+

20

R_OUT

OFFSET VOLTAGE ADJUSTMENTS

23

R_IN

+

The offset nulling circuits are identical for the 3650 and

3652 and are shown in Figure 5. The offset adjust circuitry

is optional and the units will meet the stated specifications

with the BAL terminals unconnected. Provisions are avail-

able to null both the input and output stage offsets. If the

amplifier is operated at a fixed gain, normally only one

adjustment will be used: the output stage (10kΩ adjustment)

for low gains and the input stage (50kΩ adjustment) for high

gains, (>10).

V_D

–

17

10

13

C

14

(Output)

12

C

1V

µA

V

_D= I_INX

(Input)

+V –V

Use the following procedure if it is desired to null both input

and output components. (For example, if the gain of the

amplifier is to be switched). The input stage offset is first

nulled (50kΩ adjustment) with the appropriate input signal

pins connected to input common and the amplifier set at its

maximum gain. The gain is then set to its minimum value

and the output offset is nulled (10kΩ adjustment).

FIGURE 3. Simple Model of 3650.

A simplified model of the 3652 is shown in Figure 4. The

isolation and output stages are identical to the 3650. Addi-

tional input circuitry consisting of FET buffer amplifiers and

input protection resistors have been added to give higher

differential and common-mode input impedance (10¹¹Ω),

Same as 3650 in Figure 3.

R_G1

1.6MΩ

+I_R

+I

6

4

R_O

2

8

9

11

A₁

I_IN

23

R_O

2

17

–I

10

3

1

A₂

R_G2

1.6MΩ

C

12

(Output)

–I_R

C (Input)

FIGURE 4. Simple Model of 3652.

®

7

3650/52

Model 722 DC/DC

converter or equivalent

I₁

11

10

+

C

P+

722

V+

E

V–

+V_O

–V_O

14

+V

(!)

1.3kΩ

23

R_IN

C

13

+

–V

+

17

+15VDC

I₂

26

V_OUT

–

–15VDC

23

+V_CC

20

C

–V_CC

R_IN

12

17

C

Output

–

29

–

32 Bal

10kΩ⁽¹⁾

Output

Common

Bal

V_ISO

12

16

C

15

50kΩ⁽¹⁾

NOTE: (1) Optional Offset Adjust.

V

_OUT= (I₁– I₂) X 10⁶V/A + V_ISOX IMRR⁽²⁾

3MΩ⁽¹⁾

NOTE: (1) The offset adjustment circutry and power supply connections

have been omitted for simplicity. Refer to Figure 5 for details. (2) IMRR

here is in pA/V, typically 5pA/V at 60Hz and 1pA/V at DC.

FIGURE 5. Power and Offset Adjust Connections.

FIGURE 6a. 3650 with Differential Current Sources.

INPUT CONFIGURATIONS

Some possible input configurations for the 3650 and 3652

are shown in Figures 6a, 6b, 6c. Differential input sources

are used in these examples. For situations with nondifferential

inputs, the appropriate source term should be set to zero in

the gain equations and replaced with a short in the diagrams.

V₁

R_G1

11

10

+

(1)

Figure 6a shows the 3650 connected as a transconductance

amplifier with input current sources. Voltage sources are

shown in Figure 6b. In this case the voltages are converted

to currents by R_G1and R_G2. As shown by the equations, they

perform as gain setting resistors in the voltage transfer

function. When a single voltage source is used, it is recom-

mended (but not essential) that the gain setting resistor

remain split into two equal halves in order to minimize

errors due to bias currents and common-mode rejection (see

Typical Performance Curves).

23

R_IN

C

+

V₂

17

R_G2

V_OUT

–

C

12

–

V_ISO

Figure 6c illustrates the connections for the 3652 when the

FET buffer amplifiers, A₁and A₂, are used. This configura-

tion provides an isolation amplifier with high input imped-

ance (both common-mode and differential, and good com-

mon-mode and isolation-mode rejection. It is a true isolated

instrumentation amplifier which has many benefits for noise

rejection when source impedance imbalances are present.

V_ISO

10⁶Ω

R_G1+ R_G2+ R_IN+ R_O

V_OUT= (V₁– V₂) +

IMRR

NOTE: (1) The offset adjustment circutry and power supply connections

have been omitted for simplicity. Refer to Figure 5 for details.

FIGURE 6b. 3650 with Differential Voltage Sources.

In the 3652, the voltage gain of the buffer amplifiers is

slightly less than unity, but the gain of the output stage has

been raised to compensate for this so that the overall transfer

function from the ±I or ±I_Rinputs to the output is correct. It

should be noted that A₁and A₂are buffer amplifiers. No

summing can be done at the ±I or ±I_Rinputs. Figure 6c

shows the +I and –I inputs used. If more input voltage

protection is desired, then the +I_Rand –I_Rinputs should be

used. This will increase the input noise due to the contribu-

tion from the 1.6MΩ resistors, but will provide additional

differential and common-mode protection (10ms rating of

3kV).

ERROR ANALYSIS

A model of the 3650 suitable for DC error analysis of offset

voltage, voltage drift versus temperature, bias current, etc.,

is shown in Figure 7.

A₁and A₂, the input and output stage amplifiers, are consid-

ered to be ideal. Separate external generators are used to

model the offset voltages and bias currents. R_INis assumed

to be small relative to R_G1and R_G2and is therefore omitted

from the gain equation. The feedback configuration, optics

and component matching are such that I₁= I₂= I₃= I₄. A

simple circuit analysis gives the following expression for the

®

8

3650/52

R_G1

+I_R

R_O

2

6

V₁

8

9

4

11

10

+

A₁

+I

+0

–0

(1)

23

R_IN

C

+

R_O

2

V₂

17

–I

3

A₂

V_OUT

–

R_G2

C

1

12

–I_R

–

V_ISO

10⁶Ω

V_ISO

V_OUT= (V₁– V₂) +

IMRR

R_G1+ R_G2+ R_IN+ R_O

NOTE: (1) The offset adjustment circutry and power supply connections

have been omitted for simplicity. Refer to Figure 5 for details.

FIGURE 6c. 3652 with Differential Voltage Sources.

1MΩ

I_B1

I₄

E_OSO

λ

E_OSI

R_G1

R_G2

I₃

I₁

–

+

A₂

A₁

–

+

I₂

I_B2

C (Output)

C (Input)

Optics

I₁= I₂= I₃= I₄

FIGURE 7. DC Error Analysis Model for 3650.

total output error voltage due to offset voltages and bias

The effects of temperature may be analyzed by replacing the

offset terms with their corresponding temperature gradient

terms:

currents.

10⁶

V_OUT-TOTAL

=

[E_OSI+ (I_B1R_GI– I_B2R_G2)]+ E_OSO(1)

R_G1+ R_G2

V_OUT➞∆ V_OUT/∆T, E_OSI➞∆E_OSI/∆T, etc.

Offset current is defined as the difference between the two

bias currents I_B1and I_B2. If I_B1= I_Band I_B2= I_B+I_OSI

For a complete analysis of the effects of temperature, gain

variations must also be considered.

10⁶I_OS

then, for R_G1= R_G2, V_OUT– I_B=

2

OUTPUT NOISE

The total output noise is given by:

This component of error is not a function of gain and is

therefore included as a part of E_OSOspecifications. The

output errors due to the output stage bias current are also

included in E_OSO. This results in a very simple equation for

the total error:

E_N(RMS) = √(E_NIG)²+ (E_NO

)

2

where E_N(RMS) = Total output noise

E_NI= RMS noise of the input stage

E_NO= RMS noise of the output stage

G = 10⁶/(R_G1+ R_G2)

10⁶E_OSI

V_OUT-TOTAL

=

+ E_OSO(for R_G1= R_G2).

(2)

E_NOincludes the noise contribution due to the optics and the

2R_G1

noise currents of the output stage. Errors created by the noise

current of the input stage are insignificant compared to other

noise sources and are therefore omitted.

In summary, it should be noted that equation (2) should be

used only when R_G1= R_G2. When R_G1≠ R_G2, equation (1)

applies.

®

9

3650/52

COMMON-MODE AND

ISOLATION-MODE REJECTION

APPLICATIONS

Figure 8 shows a system where isolation amplifiers (3650)

are used to measure the armature current and the armature

voltage of a motor.

The expression for the output error due to common-mode

and isolation mode voltage is:

V_CM

V_ISO

The armature current of the motor is converted to a voltage

by the calibrated shunt R_Sand then amplifier (adjustable

gain) and isolated by the 3650.

V_OUT= G

+

CMRR

IMRR

The armature voltage is sensed by the voltage divider (ad-

justable) shown and then amplified and isolated by the 3650.

GUARDING AND PROTECTION

To preserve the excellent inherent isolation characteristics of

these amplifiers, the following recommended practice should

be noted.

The 3650 provides the advantage of accurate current mea-

surement in the presence of high common-mode voltage.

Both 3650s provide the advantage of isolating the motor

ground from the control system ground. Isolated power is

provided by an isolated DC/DC converter (BB Model 722 or

equivalent).

1. Use shielded twisted pair of cable at the input as with

any instrumentation amplifier.

2. Care should be taken to minimize external capacitance.

A symmetrical layout of external components to achieve

balanced capacitance from the input terminals to output

common will preserve high IMR.

The 3652 is ideally suited for patient monitoring applica-

tions as shown in Figure 9. The fact that it is a true balanced

input instrumentation amplifier with very high differential

and common-mode impedance means that it can greatly

reduce the common-mode noise pick up due to imbalance in

lead impedances that often appear in patient monitoring

situations. The 3kV and 6kV shown in Figure 9 are the 10ms

pulse ratings of the +I_Rand –I_Rinputs for the common-mode

and differential input voltages with respect to input com-

mon. The rating of the isolation barrier is 2000Vpk continu-

3. External components and conductor patterns should be

at a distance equal to or greater than the distance

between the input and output terminals to prevent HV

breakdown.

4. Though not an absolute requirement, the use of lamin-

ated or conformally coated printed circuit boards is

recommended.

G = 1V/V

1MΩ

4.99kΩ

11

+

9.76kΩ

23

17

3650HG

To

500Ω

4.99kΩ

V_A/100

Voltage

Sense

20

O/P Com

V_A

(500V)

10

26

–

–V_CC

13

–V

+V_CC

14

12

+V

+V_O

V–

E

O/P Com

I/O Com

C

V+

722

1.3kΩ

–V_O

P+

V_OUT

+V

+15VDC

–15VDC

–V

12

14

4.75kΩ

13

11

+V_CC

26

+

–V_CC

20

500Ω

23

V_S

(100mV)

3650JG

R_S

To

100V_S

Current

Sense

17

O/P Com

4.99kΩ

10

–

G = 100V/V

FIGURE 8. Isolated Armature Current and Voltage Sensor.

®

10

3650/52

ous. The nonrecurrent pulse rating of the isolation barrier is

5000Vpk, since each unit is factory tested at 5000Vpk. If the

isolation barrier is to be subjected to higher voltages a gas

filled surge voltage protection device can be used. For

multichannel operation, two 3652s can be powered by one

Model 722 isolated DC/DC converter. The total leakage

current for both channels at 240V 60Hz would still be less

than 2µA.

The block diagram in Figure 10 shows the use of isolation

amplifiers in SCR control application.

Isolated DC/DC Converter

10⁶

50k

C

P+

V_OUT

≈

es = 20e_s

1.3kΩ

Input Common

722

V+

+V_O

–V_O

8

E

V–

25kΩ

11

14

+I_R

6

+15VDC

–15VDC

12

26

20

23

3652

–6kV

–3kV

e_s

V_OUT

To Monitor

1

17

–I_R

10

–3kV

+5kV

Output

Common

25kΩ

9

Input

Common

FIGURE 9. 3652 Used in Patient Monitoring Application (ECG, VCG, EMG Amplifier).

®

11

3650/52

A

B

C

3.0

Input

Firing CKT

3.0

Lead

Neutral

Firing CKT

+V_ISO

±V_ISO

+

+V

–V

A

B C

3650HG

AC/DC

Power

Supply

Control

–

+

±V

Input Command

Isolated

DC/DC

Converter

722

3650HG

±V_ISO

–

+

3650HG

–

FIGURE 10. 3-Phase Bidirectional SCR Control with Voltage Feedback.

®

12

3650/52

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

型号:	3650-010-2112
生命周期：	Obsolete
IHS 制造商：	METHODE ELECTRONICS INC
Reach Compliance Code：	unknown
风险等级：	5.72
Is Samacsys：	N
其他特性：	LOW PROFILE
连接器类型：	DIP CONNECTOR
联系完成配合：	TIN
联系完成终止：	TIN
触点性别：	FEMALE
DIN 符合性：	NO
滤波功能：	NO
IEC 符合性：	NO
JESD-609代码：	e3
MIL 符合性：	NO
制造商序列号：	36
混合触点：	NO
安装方式：	RIGHT ANGLE
安装类型：	BOARD
装载的行数：	1
选件：	GENERAL PURPOSE
端子节距：	3.96 mm
端接类型：	SOLDER
触点总数：	10
Base Number Matches：	1

电子百科

产品导航

产品型号3650的Datasheet PDF文件预览

3650相关产品

IC37:专业IC行业平台