4053IC贸易商引脚图技术参数全新原装-中国IC网-芯三七

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产品型号4053的概述

芯片4053的概述 4053是属于4060系列的多路复用器/解复用器（MUX/DEMUX）芯片，这类芯片在现代电子电路中找到了广泛的应用。4053芯片内置了三个独立的模拟开关，能够通过数个控制信号选择输入信号并将其传输到相应的输出端。这种特性使其在多种应用场合下变得极为灵活，广泛用于音频、视频信号的切换、模拟信号的路由等领域。芯片4053的详细参数 4053芯片的主要电气参数包括： - 工作电压(VDD)：建议工作电压范围为3V到15V，这使得它非常适合于多种电源环境。 - 输入信号范围：可以处理范围为0到VDD的输入信号。 - 切换速度：4053的切换速度通常在几十微秒范围内，具体取决于工作环境及电源电压。 - 隔离度：提供高水平的信号隔离，确保相邻通道的干扰最小。 - 功耗：在无负载情况下，静态功耗远低于1µA。以上参数显示了4053芯片在性能和兼容性方面的优越性。芯片40...

产品型号4053的Datasheet PDF文件预览

UTC 4053

CMOS IC

ANALOG MULTIPLEXERS/ DEMULTIPLEXERS

DESCRIPTION

The UTC 4053 are Triple SPDT analog multiplexers for

application as digitally–controlled analog switches.

SOP-16

DIP-16

FEATURES

* Analog Voltage Range (V_DD– V_EE) = 3.0 ~ 18 V

Note: V_EEmust be≦V_SS

* Linearized Transfer Characteristics

* Pin–to–Pin Replacement for CD4053

TSSOP-16

*Pb-free plating product number: 4053L

PIN CONFIGURATIONS

VDD

UTC 4053

INH

VEE

VSS

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

UTC 4053

CMOS IC

UTC 4053 Triple 2–Channel Analog Multiplexer/Demultiplexer

INHIBIT

CONTROLS

COMMONS

OUT/IN

SWITCHES

IN/OUT

VDD = PIN 16

VSS = PIN 8

VEE = PIN 7

Note: Control Inputs referenced to V_SS, Analog Inputs and Outputs reference to V_EE. V_EEmust be≦V_SS

ABSOLUTE MAXIMUM RATINGS*

PARAMETER

DC Supply Voltage (Referenced to V_EE, V_SS≧V_EE

SYMBOL

V_DD

RATINGS

-0.5 ~ +18.0

UNIT

)

Input or Output Voltage (DC or Transient) (Referenced to V_SS

for Control Inputs and V_EEfor Switch I/O)

Input Current (DC or Transient), per Control Pin

Switch Through Current

Power Dissipation. Per Package**

Storage Temperature

V_in, V_out

-0.5 ~ V_DD+0.5

I_in

I_SW

P_D

T_stg

T_Lead

±10

±25

500

℃

-65 ~ +150

260

℃

Lead Temperature (8 - Second Soldering)

* Maximum Ratings are those values beyond which damage to the device may occur.

** Temperature Derating: “DIP and SOP” Packages: – 7.0 mW/℃ From 65℃ ~ 125℃

ELECTRICAL CHARACTERISTICS

(Ta=25℃, unless otherwise indicated.)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

3.0

TYP#

MAX UNIT

SUPPLY REQUIREMENTS (Voltages Referenced to V_EE

)

V_DD– 3.0≧V_SS≧V_EE

Power Supply Voltage Range

Quiescent Current per Package

V_DD

Control Inputs: Vin = V_SSor V_DD

Switch I/O: V_EE≦V_I/O≦V_DD

and ∆Vswitch≦500mV*

I_DD

µA

_DD=5.0V

0.005

0.010

0.015

5.0

V_DD=10V

V_DD=15V

T_a=25℃ only (The channel

component, (Vin - Vout)/Ron, is

Total Supply Current (Dynamic Plus

Quiescent, Per Package)

not included.)

I_D(AV)

µA

V_DD=5.0V

(0.07 µA/kHz) f + I_DDTypical

(0.20 µA/kHz) f + I_DD

(0.36 µA/kHz) f + I_DD

V_DD=10V

V_DD=15V

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

UTC 4053

CMOS IC

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP#

MAX UNIT

CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to V_SS

)

Ron= per spec, Ioff = per spec

V_DD=5.0V

2.25

4.50

6.75

1.5

Low – Level Input Voltage

V_IL

V_IH

V_DD=10V

3.0

V_DD=15V

4.0

Ron= per spec, Ioff = per spec

V_DD=5.0V

3.5

7.0

2.75

5.50

8.25

High – Level Input Voltage

V_DD=10V

V_DD=15V

Input Leakage Current

Input Capacitance

SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to V_EE

Recommended Peak–to–Peak Voltage

Into or Out of the Switch

Recommended Static or Dynamic

Voltage Across the Switch** (Figure 3)

Output Offset Voltage

Iin

Cin

Vin= 0 or V_DD, V_DD=15V

±0.00001 ±0.1

µA

5.0

7.5

)

Channel On or Off

V_I/O

V_DD

600

V_PP

Channel On

∆Vswitch

µV

V_OO

Vin = 0V, No Load

∆Vswitch≦500mV*

Vin = V_ILor V_IH(Control), and

Vin = 0 to V_DD(Switch)

V_DD=5.0V

ON Resistance

Ron

Ω

250

120

1050

500

280

V_DD=10V

V_DD=15V

_DD=5.0V

ΔON Resistance Between Any Two

Channels in the Same Package

∆Ron

V_DD=10V

Ω

V_DD=15V

Vin = V_ILor V_IH(Control)

Channel to Channel or Any

One Channel, V_DD=15V

Inhibit = V_DD

Pins Not Adjacent

Pins Adjacent

Off–Channel Leakage Current

(Figure 8)

Ioff

±0.05

±100

Capacitance, Switch I/O

Capacitance, Common O/I

Capacitance, Feedthrough

(Channel Off)

C_I/O

C_O/I

0.15

0.47

C_I/O

#Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential

performance.

* For voltage drops across the switch (∆Vswitch) > 600 mV ( > 300 mV at high temperature), excessive V_DDcurrent may

be drawn, i.e. the current out of the switch may contain both V_DDand switch input components. The reliability of the

device will be unaffected unless the Maximum Ratings are exceeded. (See second page of this data sheet.)

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

UTC 4053

CMOS IC

ELECTRICAL CHARACTERISTICS*

(C_L= 50pF, T_a=25℃, V_EE≦V_SS, unless otherwise indicated.)

PARAMETER

SYMBOL V_DD– V_EEVdc

5.0

TEST CONDITIONS

MIN TYP# MAX UNIT

Propagation Delay Times

(Figure 4) Switch Input to

Switch Output (R_L= 10 kΩ)

t_PLH, t_PHL= (0.17 ns/pF) C_L+ 16.5 ns

t_PLH, t_PHL= (0.08 ns/pF) C_L+ 4.0 ns

t_PLH, t_PHL= (0.06 ns/pF) C_L+ 3.0 ns

(R_L=10kΩ, V_EE=V_SS)Output “1” or “0”

to High Impedance, or High

t_PLH,t_PHL

5.0

8.0

6.0

275

140

110

300

120

550

280

220

600

240

160

t_PHZ,t_PLZ

t_PZH,t_PZL

Inhibit to Output

Impedance to “1” or “0” Level

Control Input to Output

t_PLH,t_PHL

R_L= 10 kΩ, V_EE= V_SS

Second Harmonic Distortion

Bandwidth (Figure 5)

R_L= 10KΩ, f = 1 kHz, Vin = 5 V_PP

R_L= 1kΩ, Vin = 1/2 (V_DD–V_EE) p–p,

C_L= 50pF, 20 Log (Vout/Vin) = -3dB)

R_L= 1KΩ, Vin = 1/2 (V_DD– V_EE) p–p

fin = 55 MHz

R_L= 1 kΩ, Vin = 1/2 (V_DD–V_EE) p–p

fin = 3.0 MHz

0.07

-50

MHz

Off Channel Feedthrough

Attenuation (Figure 5)

Channel Separation

(Figure 6)

Crosstalk, Control Input to

Common O/I (Figure 7)

R₁= 1 kΩ, R_L= 10 kΩ Control

t_TLH= t_THL= 20 ns, Inhibit = V_SS

)

* The formulas given are for the typical characteristics only at 25℃.

# Data labelled “Typ” is not lo be used for design purposes but In intended as an indication of the IC’s potential

performance.

VDD

IN/OUT

OUT/IN

VEE

VDD

LEVEL

CONVERTED

CONTROL

OUT/IN

IN/OUT

CONTROL

VEE

Figure 1. Switch Circuit Schematic

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

UTC 4053

CMOS IC

VDD

VEE

TRUTH TABLE

Control Inputs

INH

ON Switches

BINARY TO 1 - OF - 2

A 11

B 10

Select

LEVEL

DECODER WITH

INHIBIT

Inhibit

CONVERTER

UTC 4053

Z0 Y0 X0

Z0 Y0 X1

Z0 Y1 X0

Z0 Y1 X1

Z1 Y0 X0

Z1 Y0 X1

Z1 Y1 X0

Z1 Y1 X1

None

V^SS

X0 12

X1 13

14 X

15 Y

Figure 2. UTC 4053 Functional Diagram

x = Don’t Care

350

300

250

= 7.5 V

= 5.0 V

V^D^EE^D= - 7.5 V

V^D^EE^D= -5.0 V

300

250

=25℃

Ta =25℃

200

150

100

200

150

100

-10 -8.0 -6.0 -4.0 -2.0

2.0 4.0 6.0 8.0 10

-10 -8.0 -6.0 -4.0 -2.0

2.0 4.0 6.0 8.0 10

INPUT VOLTAGE, Vin (VOLTS)

350

300

250

200

150

100

DD = 2.5 V

EE = - 2.5 V

=25℃

-10 -8.0 -6.0 -4.0 -2.0

2.0 4.0 6.0 8.0 10

INPUT VOLTAGE, Vin (VOLTS)

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

UTC 4053

CMOS IC

UTC assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or

other parameters) listed in products specifications of any and all UTC products described or contained

herein. UTC products are not designed for use in life support appliances, devices or systems where

malfunction of these products can be reasonably expected to result in personal injury. Reproduction in

whole or in part is prohibited without the prior written consent of the copyright owner. The information

presented in this document does not form part of any quotation or contract, is believed to be accurate

and reliable and may be changed without notice.

UTC UNISONIC TECHNOLOGIES CO., LTD.

www.unisonic.com.tw

QW-R502-036,A

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