6N136SDV各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

July 2005

Single-channel: 6N135, 6N136, HCPL-2503, HCPL-4502

Dual-Channel: HCPL-2530, HCPL-2531

High Speed Transistor Optocouplers

Features

Description

■ High speed-1 MBit/s

The HCPL-4502/HCPL-2503, 6N135/6 and HCPL-2530/HCPL-

2531 optocouplers consist of an AlGaAs LED optically coupled

to a high speed photodetector transistor.

■ Superior CMR-10 kV/µs

■ Dual-Channel HCPL-2530/HCPL-2531

■ Double working voltage-480V RMS

■ CTR guaranteed 0-70°C

A separate connection for the bias of the photodiode improves

the speed by several orders of magnitude over conventional

phototransistor optocouplers by reducing the base-collector

capacitance of the input transistor.

■ U.L. recognized (File # E90700)

An internal noise shield provides superior common mode rejec-

tion of 10kV/µs. An improved package allows superior insulation

permitting a 480 V working voltage compared to industry stan-

dard of 220 V.

Applications

■ Line receivers

■ Pulse transformer replacement

■ Output interface to CMOS-LSTTL-TTL

■ Wide bandwidth analog coupling

Package

Schematic

V_CC

+

V_CC

1

8

N/C

1

8

V_F1

_

8

V₀₁

V_B

2

7

6

5

+

2

3

4

7

6

5

1

V_F

_

V₀₂

3

V_O

V_F2

GND

N/C

GND

+

4

8

1

HCPL-2530/HCPL-2531

6N135, 6N136, HCPL-2503, HCPL-4502

1

Pin 7 is not connected in

Part Number HCPL-4502

1

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Absolute Maximum Ratings (T = 25°C unless otherwise speciﬁed)

A

Parameter

Symbol

Value

Units

°C

Storage Temperature

T

-55 to +125

-55 to +100

260 for 10 sec

STG

Operating Temperature

T

°C

OPR

Lead Solder Temperature

EMITTER

T

°C

SOL

DC/Average Forward Input Current

Peak Forward Input Current (50% duty cycle, 1 ms P.W.)

Each Channel (Note 1)

Each Channel (Note 2)

I

(avg)

25

50

mA

F

I (pk)

F

Peak Transient Input Current - (≤1 µs P.W., 300 pps)

I (trans)

1.0

5

A

F

Each Channel

Reverse Input Voltage

V

P

V

R

D

Input Power Dissipation

(6N135/6N136 and HCPL-2503/4502)

100

45

mW

(HCPL-2530/2531 ) Each Channel (Note 3)

DETECTOR

Average Output Current

Peak Output Current

Emitter-Base Reverse Voltage

Supply Voltage

Each Channel

I

(avg)

(pk)

8

mA

V

O

I

16

O

(6N135, 6N136 and HCPL-2503 only)

V

5

-0.5 to 30

-0.5 to 20

5

EBR

V

CC

Output Voltage

V

O

Base Current

(6N135, 6N136 and HCPL-2503 only)

(6N135, 6N136, HCPL-2503, HCPL-4502) (Note 4)

(HCPL-2530, HCPL-2531) Each Channel

I

mA

mW

B

Output power

dissipation

PD

100

35

2

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Electrical Characteristics (T = 0 to 70°C Unless otherwise speciﬁed)

A

Individual Component Characteristics

Parameter

Test Conditions

Symbol

Device

Min Typ** Max Unit

EMITTER

(I = 16 mA, T =25°C)

V

F

1.45

1.7

1.8

V

F

A

Input Forward Voltage

Input Reverse Breakdown Voltage

(I = 16 mA)

F

(I = 10 µA)

B

5.0

V

R

VR

Temperature coefﬁcient of

forward voltage

(I = 16 mA) (∆V /∆T )

-1.6

mV/°C

F

A

DETECTOR

Logic high output current

(I = 0 mA, V = V = 5.5 V)

I

All

0.001

0.005

0.5

1

µA

F

O

CC

OH

(T =25°C)

A

(I = 0 mA, V = V = 15 V)

6N135

6N136

F

O

CC

(T =25°C)

A

HCPL-4502

HCPL-2503

(I = 0 mA, V = V = 15 V)

All

50

F

O

CC

Logic low supply current

Logic high supply current

(I = 16 mA, V = Open)

I

CCL

6N135

6N136

HCPL-4502

HCPL-2503

120

200

µA

F

O

(V = 15 V)

CC

(I = I = 16 mA, V = Open)

HCPL-2530

HCPL-2531

400

1

F1

F2

O

(V = 15 V)

CC

(I = 0 mA, V = Open, V = 15

I

CCH

6N135

6N136

HCPL-4502

HCPL-2503

F

O

CC

V)

(T =25°C)

A

(I = 0 mA, V = Open)

6N135

6N136

HCPL-4502

HCPL-2503

2

4

F

O

(V = 15 V)

CC

(I = 0 mA, V = Open)

HCPL-2530

HCPL-2531

0.02

F

O

(V = 15 V)

CC

** All Typicals at T = 25°C

A

3

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Transfer Characteristics (T = 0 to 70°C Unless otherwise speciﬁed)

A

Parameter

COUPLED

Test Conditions

Symbol

Device

Min Typ** Max Unit

(I = 16 mA, V = 0.4 V)

CTR

6N135

HCPL-2530

7

18

50

%

F

O

(V = 4.5 V, T =25°C)

CC

A

6N136

HCPL-4502

HCPL-2531

19

27

50

%

Current transfer ratio

(Note 5)

HCPL-2503

6N135

12

5

27

21

%

(I = 16 mA, V = 4.5 V)

V

=0.4V

=0.5V

=0.4V

F

CC

OL

V

HCPL-2530

6N136

HCPL-4502

15

9

30

%

V

=0.5V

=0.4V

HCPL-2531

HCPL-2503

6N135

OL

30

%

V

OL

(I = 16 mA, I = 1.1 mA)

V

OL

0.18

0.25

0.4

0.5

0.4

F

O

Logic low output voltage

output voltage

(V = 4.5 V, T =25°C)

CC A

HCPL-2530

(I = 16 mA, I = 3 mA)

6N136

F

O

(V = 4.5 V, T =25°C)

HCPL-2503

CC

A

HCPL-2531

0.25

0.5

(I = 16 mA, I = 0.8 mA)

6N135

F

O

(V = 4.5 V)

HCPL-2530

CC

(I = 16 mA, I = 2.4 mA)

HCPL-4502

HCPL-2531

0.5

F

O

(V = 4.5 V)

CC

** All Typicals at T = 25°C

A

4

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Switching Characteristics (T = 0 to 70°C unless otherwise speciﬁed., V = 5 V)

A

CC

Parameter

Test Conditions

Symbol Device Min Typ** Max Unit

Propagation delay T = 25°C, (R = 4.1 kΩ, I = 16 mA) (Note 6) (Fig. 7)

time to logic low

6N135

HCPL-2530

0.45

1.5

µs

A

L

F

T

PHL

(R = 1.9 kΩ, I = 16 mA) (Note 7) (Fig. 7)

6N136

0.45

0.8

µs

L

F

T = 25°C

HCPL-4502

HCPL-2503

HCPL-2531

A

(R = 4.1 kΩ, I = 16 mA) (Note 6) (Fig. 7)

6N135

HCPL-2530

2.0

1.0

µs

L

F

(R = 1.9 kΩ, I = 16 mA) (Note 7) (Fig. 7)

6N136

L

F

HCPL-4502

HCPL-2503

HCPL-2531

Propagation delay T = 25°C, (R = 4.1 kΩ, I = 16 mA) (Note 6) (Fig. 7)

time to logic high

T

PLH

6N135

HCPL-2530

0.5

0.3

1.5

0.8

µs

A

L

F

(R = 1.9 kΩ, I = 16 mA) (Note 7) (Fig. 7)

6N136

L

F

T = 25°C

HCPL-4502

HCPL-2503

HCPL-2531

A

(R = 4.1 kΩ, I = 16 mA) (Note 6) (Fig. 7)

6N135

HCPL-2530

2.0

1.0

µs

L

F

(R = 1.9 kΩ, I = 16 mA) (Note 7) (Fig. 7)

6N136

L

F

HCPL-4502

HCPL-2503

HCPL-2531

Common mode

transient

immunity at

logic high

(I = 0 mA, V

= 10 V , R = 4.1 kΩ)

|CM |

6N135

HCPL-2530

10,000

V/µs

F

CM

P-P

L

H

(Note 8) (Fig. 8) T = 25°C

A

(I = 0 mA, V

= 10 V )

P-P

6N136

F

CM

T = 25°C, (R = 1.9 kΩ)

HCPL-4502

HCPL-2503

HCPL-2531

A

L

(Note 8) (Fig. 8)

Common mode

transient

immunity at

logic low

(I = 16 mA, V

= 10 V , R = 4.1 kΩ)

|CM |

6N135

HCPL-2530

10,000

V/µs

F

CM

P-P

L

(Note 8) (Fig. 8) T = 25°C

A

(I = 16 mA, V

= 10 V )

P-P

6N136

F

CM

(R = 1.9 kΩ)

HCPL-4502

HCPL-2503

HCPL-2531

L

(Note 8) (Fig. 8)

** All Typicals at T = 25°C

A

5

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Isolation Characteristics (T = 0 to 70°C Unless otherwise speciﬁed)

A

Characteristics

Test Conditions

Symbol Min

Typ**

Max

Unit

Input-output

(Relative humidity = 45%)

I

1.0

µA

I-O

insulation leakage current

(T = 25°C, t = 5 s)

A

(V = 3000 VDC)

I-O

(Note 9)

Withstand insulation test voltage

(RH ≤ 50%, T = 25°C)

V

2500

V

A

ISO

RMS

(Note 9) ( t = 1 min.)

12

Resistance (input to output)

Capacitance (input to output)

DC Current gain

(Note 9) (V = 500 VDC)

R

C

10

Ω

I-O

(Note 9) (f = 1 MHz)

0.6

150

pF

(I = 3 mA, V = 5 V)

HFE

O

Input-Input

Insulation leakage current

(RH ≤ 45%, V = 500 VDC) (Note 10)

I

0.005

µA

Ω

I-I

t = 5 s, (HCPL-2530/2531 only)

11

Input-Input Resistance

Input-Input Capacitance

(V = 500 VDC) (Note 10)

R

10

I-I

(HCPL-2530/2531 only)

(f = 1 MHz) (Note 10)

C

0.03

pF

I-I

(HCPL-2530/2531 only)

Notes

1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.

2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C.

3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.

4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.

5. Current Transfer Ratio is deﬁned as a ratio of output collector current, I , to the forward LED input current, I , times 100%.

O

F

6. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1kΩ pull-up resistor.

7. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor.

8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the com-

cm

mon mode pulse signal V , to assure that the output will remain in a logic high state (i.e., V >2.0 V). Common mode transient

CM

O

immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode pulse signal,

cm

V

, to assure that the output will remain in a logic low state (i.e., V <0.8 V).

CM

O

9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.

10. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.

I

6

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Fig. 1 Normalized CTR vs. Forward Current

Fig. 2 Normalized CTR vs.Temperature

1.2

1.0

0.8

0.6

0.4

0.2

0.0

1.2

1.0

0.8

0.6

0.4

0.2

0.0

V

= 0.4 V

I = 16mA

F

O

Normalized to:

= 16 mA

Normalized to:

T = 25°C

A

= 5 V

V

= 5 V

CC

I

F

T

= 25°C

V

= 0.4 V

A

O

0.1

1

10

100

-60

-40

-20

0

20

40

60

80

100

I

- FORWARD CURRENT (mA)

T - TEMPERATURE (°C)

A

F

Fig. 4 Logic High Output Current

vs.Temperature

Fig. 3 Output Current vs. Output Voltage

1000

100

10

16

14

12

10

8

T_A= 25°C

_CC= 5 V

I

_F= 40 mA

_F= 35 mA

I

V

= 0 mA

F

V

= 5 V

CC

= 5 V

I

O

I

_F= 30 mA

_F= 25 mA

I

_F= 20 mA

_F= 15 mA

6

I

1

4

I_F= 10 mA

2

I_F= 5 mA

0.1

-60

0

-40

-20

0

20

40

60

80

100

0

2

4

6

8

10

12

14

16

18

20

T

- TEMPERATURE (°C)

V

- OUTPUT VOLTAGE (V)

A

O

Fig. 5 Propagation Delay vs.Temperature

Fig. 6 Propagation Delay vs. Load Resistance

800

700

600

500

400

300

200

100

0

10000

R

_L= 4.1 K (TPLH)

R_L= 4.1 K (TPLH)

I

- 16 mA (TPHL)

F

I

- 10 mA (TPHL)

F

1000

I

- 16 mA (TPLH)

F

I

V

= 16 mA

F

R_L= 1.9 K (TPHL)

R_L= 1.9 K (TPLH)

= 5 V

V

= 5 V

CC

= 25°C

T

A

I

- 10 mA (TPLH)

F

100

-60

-40

-20

0

20

40

60

80

100

1

10

T

- TEMPERATURE (°C)

R = LOAD RESISTANCE (kΩ)

L

A

7

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Noise

Shield

Noise

Shield

Pulse

+

V_CC

I

F

V

CC

Generator

tr = 5ns

+5 V

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

Pulse

Z_O= 50

Ω

R

L

Generator

tr = 5ns

I_F

+

V

F1

V_B

V01

-

10% DUTY CYCLE

I/f < 100µS

V_O

R_L

Z_O= 50

10% D.C.

I/f< 100µs

Ω

V_F

-

C

L

= 1.5 µF

V_O

V02

-

V_O

I

F

V

F2

0.1 µF

MONITOR

+

0.1 µF

I_FMonitor

GND

R_m

C

L = 1.5 µF

GND

Test Circuit for 6N135, 6N136, HCPL-2503 and HCPL- 4502

Test Circuit for HCPL-2530 and HCPL-2531

I_F

0

5 V

V_O

1.5 V

V_OL

T_PHL

T_PLH

Fig. 7 Switching Time Test Circuit

I_F

Noise

Shield

Noise

Shield

V_CC

V

CC

+

+5 V

V_O

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

I_F

R

L

+

V

F1

V_B

V01

-

R_L

A

V_F

-

A

V_O

V02

B

-

0.1 µF

V_O

0.1 µF

B

V_FF

V

F2

V_FF

+

GND

-

V_CM

+

-

V_CM

-

+

Pulse Gen

Test Circuit for 6N135, 6N136, HCPL-2503 and HCPL-4502

Test Circuit for HCPL-2530 and HCPL-2531

V_CM10 V

0 V

90% 90%

10%

t_r

10%

t_f

V_O

5 V

Switch at A : I_F= 0 mA

V_O

V_OL

Switch at A : I_F= 16 mA

Fig. 8 Common Mode Immunity Test Circuit

8

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Package Dimensions (Through Hole)

Package Dimensions (Surface Mount)

0.390 (9.91)

0.370 (9.40)

PIN 1

ID.

PIN 1

ID.

4

3

2

1

4

5

3

6

2

7

1

8

0.270 (6.86)

0.250 (6.35)

0.270 (6.86)

0.250 (6.35)

5

6

7

8

0.390 (9.91)

0.370 (9.40)

0.300 (7.62)

TYP

0.070 (1.78)

0.045 (1.14)

0.070 (1.78)

0.045 (1.14)

0.020 (0.51)

MIN

0.016 (0.41)

0.008 (0.20)

0.020 (0.51) MIN

0.200 (5.08)

0.140 (3.55)

0.154 (3.90)

0.120 (3.05)

0.045 [1.14]

0.022 (0.56)

0.016 (0.41)

0.022 (0.56)

0.016 (0.41)

15° MAX

0.315 (8.00)

MIN

0.016 (0.40)

0.008 (0.20)

0.100 (2.54)

TYP

0.300 (7.62)

TYP

0.100 (2.54) TYP

0.405 (10.30)

MIN

Lead Coplanarity : 0.004 (0.10) MAX

Package Dimensions (0.4"Lead Spacing)

Recommended Pad Layout for

Surface Mount Leadform

PIN 1

ID.

4

3

2

1

0.070 (1.78)

0.270 (6.86)

0.250 (6.35)

0.060 (1.52)

5

6

7

8

0.390 (9.91)

0.370 (9.40)

0.100 (2.54)

0.295 (7.49)

0.415 (10.54)

0.070 (1.78)

0.045 (1.14)

0.030 (0.76)

0.004 (0.10) MIN

0.200 (5.08)

0.140 (3.55)

0.154 (3.90)

0.120 (3.05)

0.022 (0.56)

0.016 (0.41)

0° to 15°

0.016 (0.40)

0.008 (0.20)

0.400 (10.16)

TYP

0.100 (2.54) TYP

NOTE

All dimensions are in inches (millimeters)

9

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Ordering Information

Option

Example Part Number

6N135S

Description

S

SD

W

Surface Mount Lead Bend

6N135SD

Surface Mount; Tape and reel

0.4" Lead Spacing

6N135W

V

6N135V

VDE0884

TV

SV

SDV

6N135TV

VDE0884; 0.4” lead spacing

VDE0884; surface mount

VDE0884; surface mount; tape and reel

6N135SV

6N135SDV

Marking Information

1

2

2503

6

V XX YY T1

5

3

4

Deﬁnitions

1

Fairchild logo

2

3

Device number

VDE mark (Note: Only appears on parts ordered with VDE option –

See order entry table)

4

5

6

Two digit year code, e.g., ‘03’

Two digit work week ranging from ‘01’ to ‘53’

Assembly package code

10

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

Carrier Tape Specifications

12.0 0.1

4.0 0.1

Ø1.55 0.05

1.75 0.10

4.90 0.20

0.30 0.05

4.0 0.1

7.5 0.1

16.0 0.3

10.30 0.20

13.2 0.2

Ø1.6 0.1

0.1 MAX

10.30 0.20

User Direction of Feed

Reﬂow Proﬁle

300

250

200

150

100

50

215C, 10–30 s

225C peak

Time above 183C, 60–150 sec

Ramp up = 3C/sec

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

Time (Minute)

• Peak reflow temperature: 225C (package surface temperature)

• Time of temperature higher than 183C for 60–150 seconds

• One time soldering reflow is recommended

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Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

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FASTr™

FPS™

FRFET™

GlobalOptoisolator™

GTO™



QFET

QS™

TINYOPTO™

TruTranslation™

UHC™

QT Optoelectronics™

Quiet Series™

RapidConfigure™

RapidConnect™

µSerDes™

SILENT SWITCHER

SMART START™

SPM™



UltraFET

HiSeC™

I²C™

UniFET™

VCX™

Wire™

MSXPro™

OCX™

i-Lo™

ImpliedDisconnect™

IntelliMAX™



OCXPro™

OPTOLOGIC



OPTOPLANAR™

PACMAN™

POP™

Power247™

PowerEdge™

FACT Quiet Series™

Stealth™

Across the board. Around the world.™

SuperFET™

SuperSOT™-3

SuperSOT™-6



The Power Franchise

Programmable Active Droop™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY

PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY

ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT

CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I16

12

Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3

www.fairchildsemi.com

型号:	6N136SDV
生命周期：	Active
IHS 制造商：	ON SEMICONDUCTOR
Reach Compliance Code：	compliant
风险等级：	5.62
光电设备类型：	LOGIC IC OUTPUT OPTOCOUPLER
Base Number Matches：	1

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