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    产品型号74AS842DW的Datasheet PDF文件预览

    REI Datasheet  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-Bit Bus-Interface D-Type Latches with 3-State Outputs  
    These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or  
    relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O  
    ports, bidirectional bus drivers, and working registers.  
    The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have  
    noninverting data (D) inputs. The SN74ALS842 has inverting D inputs.  
    Quality Overview  
    Rochester Electronics  
    Manufactured Components  
    •
    •
    •
    ISO-9001  
    AS9120 certification  
    Qualified Manufacturers List (QML) MIL-PRF-38535  
    Rochester branded components are  
    manufactured using either die/wafers  
    purchased from the original suppliers  
    or Rochester wafers recreated from the  
    original IP. All recreations are done with  
    the approval of the OCM.  
    •
    •
    Class Q Military  
    Class V Space Level  
    •
    Qualified Suppliers List of Distributors (QSLD)  
    •
    Rochester is a critical supplier to DLA and  
    meets all industry and DLA standards.  
    Parts are tested using original factory  
    test programs or Rochester developed  
    test solutions to guarantee product  
    meets or exceeds the OCM data sheet.  
    RochesterElectronics, LLCiscommittedtosupplying  
    products that satisfy customer expectations for  
    quality and are equal to those originally supplied by  
    industry manufacturers.  
    The original manufacturer’s datasheet accompanying this document reflects the performance  
    and specifications of the Rochester manufactured version of this device. Rochester Electronics  
    guarantees the performance of its semiconductor products to the original OEM specifications.  
    ‘Typical’ values are for reference purposes only. Certain minimum or maximum ratings may be  
    based on product characterization, design, simulation, or sample testing.  
    © 2013 Rochester Electronics, LLC. All Rights Reserved 12232013  
    To learn more, please visit www.rocelec.com  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    SN74ALS841, SN74AS841A . . . DW OR NT PACKAGE  
    (TOP VIEW)  
    • 3-State Buffer-Type Outputs Drive Bus  
    Lines Directly  
    • Bus-Structured Pinout  
    • Provide Extra Bus-Driving Latches  
    Necessary for Wider Address/Data Paths or  
    Buses With Parity  
    OE  
    1D  
    2D  
    3D  
    4D  
    5D  
    6D  
    7D  
    8D  
    V
    CC  
    1
    2
    3
    4
    5
    6
    7
    8
    9
    24  
    23 1Q  
    22 2Q  
    21 3Q  
    20 4Q  
    19 5Q  
    18 6Q  
    17 7Q  
    16 8Q  
    15 9Q  
    14 10Q  
    13 LE  
    • Buffered Control Inputs to Reduce  
    dc Loading Effects  
    • Power-Up High-Impedance State  
    • Package Options Include Plastic  
    Small-Outline (DW) Packages and Standard  
    Plastic (NT) 300-mil DIPs  
    9D 10  
    10D 11  
    GND 12  
    description  
    These 10-bit latches feature 3-state outputs  
    designed specifically for driving highly capacitive  
    or relatively low-impedance loads. They are  
    particularly suitable for implementing buffer  
    registers, I/O ports, bidirectional bus drivers, and  
    working registers.  
    SN74ALS842 . . . DW OR NT PACKAGE  
    (TOP VIEW)  
    OE  
    1D  
    2D  
    3D  
    4D  
    5D  
    6D  
    7D  
    8D  
    1
    2
    3
    4
    5
    6
    7
    8
    9
    24  
    V
    CC  
    23 1Q  
    22 2Q  
    21 3Q  
    20 4Q  
    19 5Q  
    18 6Q  
    17 7Q  
    16 8Q  
    15 9Q  
    14 10Q  
    13 LE  
    The ten latches are transparent D-type latches.  
    The SN74ALS841 and SN74AS841A have  
    noninverting data (D) inputs. The SN74ALS842  
    has inverting D inputs.  
    Abufferedoutput-enable(OE)inputplacestheten  
    outputs in either a normal logic state (high or low  
    logic levels) or a high-impedance state. In the  
    high-impedance state, the outputs neither load  
    nor drive the bus lines significantly. The  
    high-impedancestateandincreaseddriveprovide  
    the capability to drive bus lines without interface or  
    pullup components.  
    9D 10  
    10D 11  
    GND 12  
    OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can  
    be entered while the outputs are off.  
    The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.  
    Copyright 1995, Texas Instruments Incorporated  
    PRODUCTION DATA information is current as of publication date.  
    Products conform to specifications per the terms of Texas Instruments  
    standard warranty. Production processing does not necessarily include  
    testing of all parameters.  
    1
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    Function Tables  
    SN74ALS841, SN74AS841A  
    INPUTS  
    OUTPUT  
    Q
    OE  
    L
    LE  
    H
    H
    L
    D
    H
    L
    H
    L
    L
    L
    X
    X
    Q
    0
    H
    X
    Z
    SN74ALS842  
    INPUTS  
    OUTPUT  
    Q
    OE  
    L
    LE  
    H
    H
    L
    D
    H
    L
    L
    L
    H
    L
    X
    X
    Q
    0
    H
    X
    Z
    †
    logic symbols  
    SN74ALS841, SN74AS841A  
    SN74ALS842  
    1
    1
    EN  
    C1  
    EN  
    OE  
    OE  
    LE  
    13  
    13  
    LE  
    C1  
    2
    23  
    2
    23  
    1D  
    1D  
    1Q  
    1D  
    1Q  
    1D  
    3
    2D  
    4
    22  
    21  
    20  
    19  
    18  
    17  
    16  
    15  
    3
    22  
    21  
    20  
    19  
    18  
    17  
    16  
    15  
    2Q  
    3Q  
    4Q  
    5Q  
    6Q  
    7Q  
    8Q  
    9Q  
    2Q  
    3Q  
    4Q  
    5Q  
    6Q  
    7Q  
    8Q  
    9Q  
    2D  
    3D  
    4D  
    4
    3D  
    5
    5
    4D  
    6
    6
    5D  
    7
    5D  
    6D  
    7
    6D  
    8
    8
    7D  
    9
    7D  
    8D  
    9
    8D  
    10  
    9D  
    11  
    10  
    11  
    9D  
    14  
    14  
    10D  
    10D  
    10Q  
    10Q  
    †
    These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
    2
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    logic diagrams (positive logic)  
    SN74ALS841, SN74AS841A  
    1
    OE  
    13  
    LE  
    C1  
    1D  
    23  
    2
    1Q  
    1D  
    To Nine Other Channels  
    SN74ALS842  
    1
    OE  
    13  
    LE  
    C1  
    1D  
    23  
    2
    1Q  
    1D  
    To Nine Other Channels  
    †
    absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
    Supply voltage, V  
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
    CC  
    Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
    I
    Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V  
    Operating free-air temperature range, T : SN74ALS841, SN74ALS842 . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
    A
    Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
    †
    Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
    functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
    implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
    3
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    recommended operating conditions  
    SN74ALS841  
    SN74ALS842  
    UNIT  
    MIN NOM  
    MAX  
    V
    V
    V
    Supply voltage  
    4.5  
    2
    5
    5.5  
    V
    V
    CC  
    High-level input voltage  
    Low-level input voltage  
    High-level output current  
    Low-level output current  
    Pulse duration, LE high  
    Setup time, data before LE↓  
    Hold time, data after LE↓  
    Operating free-air temperature  
    IH  
    0.8  
    –2.6  
    24  
    V
    IL  
    I
    I
    t
    t
    t
    mA  
    mA  
    ns  
    ns  
    ns  
    °C  
    OH  
    OL  
    w
    20  
    10  
    5
    su  
    h
    T
    A
    0
    70  
    electrical characteristics over recommended operating free-air temperature range (unless  
    otherwise noted)  
    SN74ALS841  
    SN74ALS842  
    PARAMETER  
    TEST CONDITIONS  
    UNIT  
    †
    MIN TYP  
    MAX  
    V
    V
    V
    V
    V
    = 4.5 V,  
    I = –18 mA  
    –1.2  
    V
    V
    IK  
    CC  
    CC  
    CC  
    I
    = 4.5 V to 5.5 V,  
    = 4.5 V,  
    I
    I
    I
    I
    = –0.4 mA  
    = –2.6 mA  
    = 12 mA  
    = 24 mA  
    = 2.7 V  
    V
    –2  
    OH  
    OH  
    OL  
    OL  
    CC  
    2.4  
    OH  
    3.2  
    0.25  
    0.35  
    0.4  
    0.5  
    20  
    V
    OL  
    V
    CC  
    = 4.5 V  
    V
    I
    I
    I
    I
    I
    I
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    V
    V
    µA  
    µA  
    OZH  
    OZL  
    I
    O
    O
    = 0.4 V  
    –20  
    0.1  
    20  
    V = 7 V  
    I
    mA  
    µA  
    V = 2.7 V  
    I
    IH  
    V = 0.4 V  
    I
    –0.1  
    –112  
    30  
    mA  
    mA  
    IL  
    ‡
    V
    O
    = 2.25 V  
    –30  
    O
    Outputs high  
    Outputs low  
    19  
    38  
    23  
    20  
    48  
    27  
    SN74ALS841  
    SN74ALS842  
    V
    = 5.5 V  
    = 5.5 V  
    62  
    CC  
    CC  
    Outputs disabled  
    Outputs high  
    Outputs low  
    40  
    I
    mA  
    CC  
    35  
    V
    74  
    Outputs disabled  
    44  
    †
    ‡
    All typical values are at V  
    = 5 V, T = 25°C.  
    A
    CC  
    The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
    .
    OS  
    4
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    switching characteristics (see Figure 1)  
    V
    C
    = 4.5 V to 5.5 V,  
    = 50 pF,  
    CC  
    L
    R1 = 500 Ω,  
    R2 = 500 Ω,  
    T
    A
    FROM  
    TO  
    (OUTPUT)  
    PARAMETER  
    (INPUT)  
    UNIT  
    †
    = MIN to MAX  
    SN74ALS841  
    MIN  
    2
    MAX  
    13  
    t
    t
    t
    t
    t
    t
    t
    t
    PLH  
    PHL  
    PLH  
    PHL  
    PZH  
    PZL  
    PHZ  
    PLZ  
    D
    ns  
    ns  
    ns  
    ns  
    Q
    Q
    Q
    Q
    2
    13  
    7
    21  
    LE  
    8
    26  
    2
    12  
    OE  
    OE  
    2
    12  
    2
    10  
    2
    12  
    †
    For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
    switching characteristics (see Figure 1)  
    V
    C
    = 4.5 V to 5.5 V,  
    = 50 pF,  
    CC  
    L
    R1 = 500 Ω,  
    R2 = 500 Ω,  
    T
    A
    FROM  
    TO  
    (OUTPUT)  
    PARAMETER  
    (INPUT)  
    UNIT  
    †
    = MIN to MAX  
    SN74ALS842  
    MIN  
    4
    MAX  
    18  
    t
    t
    t
    t
    t
    t
    t
    t
    PLH  
    PHL  
    PLH  
    PHL  
    PZH  
    PZL  
    PHZ  
    PLZ  
    ns  
    ns  
    ns  
    ns  
    D
    Q
    Q
    Q
    Q
    3
    13  
    8
    27  
    LE  
    6
    20  
    2
    12  
    OE  
    OE  
    2
    12  
    1
    10  
    2
    12  
    †
    For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
    ‡
    absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
    Supply voltage, V  
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
    CC  
    Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
    I
    Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V  
    Operating free-air temperature range, T : SN74AS841A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
    A
    Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
    ‡
    Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
    functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
    implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
    5
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    recommended operating conditions  
    SN74AS841A  
    MIN NOM MAX  
    UNIT  
    V
    V
    V
    Supply voltage  
    4.5  
    2
    5
    5.5  
    V
    V
    CC  
    High-level input voltage  
    Low-level input voltage  
    High-level output current  
    Low-level output current  
    Pulse duration, LE high  
    Setup time, data before LE↓  
    Hold time, data after LE↓  
    Operating free-air temperature  
    IH  
    0.8  
    –24  
    48  
    V
    IL  
    I
    I
    t
    t
    t
    mA  
    mA  
    ns  
    ns  
    ns  
    °C  
    OH  
    OL  
    w
    4
    2.5  
    2.5  
    0
    su  
    h
    T
    A
    70  
    electrical characteristics over recommended operating free-air temperature range (unless  
    otherwise noted)  
    SN74AS841A  
    PARAMETER  
    TEST CONDITIONS  
    UNIT  
    †
    MIN TYP  
    MAX  
    V
    V
    V
    V
    V
    = 4.5 V,  
    I = –18 mA  
    –1.2  
    V
    IK  
    CC  
    I
    = 4.5 V to 5.5 V,  
    I
    I
    I
    I
    = –2 mA  
    = –15 mA  
    = –24 mA  
    = 48 mA  
    = 2.7 V  
    V
    –2  
    CC  
    OH  
    OH  
    OH  
    OL  
    CC  
    2.4  
    3.2  
    V
    OH  
    V
    CC  
    = 4.5 V  
    2
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    V
    CC  
    = 4.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    = 5.5 V,  
    0.35  
    0.5  
    50  
    V
    OL  
    OZH  
    OZL  
    I
    I
    I
    I
    I
    I
    I
    V
    V
    µA  
    µA  
    mA  
    µA  
    mA  
    mA  
    O
    = 0.4 V  
    –50  
    0.1  
    O
    V = 7 V  
    I
    V = 2.7 V  
    I
    20  
    IH  
    V = 0.4 V  
    I
    –0.5  
    –112  
    60  
    IL  
    ‡
    V
    O
    = 2.25 V  
    –30  
    O
    Outputs high  
    Outputs low  
    36  
    58  
    56  
    I
    V
    CC  
    = 5.5 V  
    94  
    mA  
    CC  
    Outputs disabled  
    93  
    †
    ‡
    All typical values are at V  
    = 5 V, T = 25°C.  
    A
    CC  
    The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
    .
    OS  
    6
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    switching characteristics (see Figure 1)  
    V
    C
    = 4.5 V to 5.5 V,  
    = 50 pF,  
    CC  
    L
    R1 = 500 Ω,  
    R2 = 500 Ω,  
    T
    A
    FROM  
    TO  
    (OUTPUT)  
    PARAMETER  
    (INPUT)  
    UNIT  
    †
    = MIN to MAX  
    SN74AS841A  
    MIN  
    1
    MAX  
    6.5  
    10.5  
    12  
    t
    t
    t
    t
    t
    t
    t
    t
    PLH  
    PHL  
    PLH  
    PHL  
    PZH  
    PZL  
    PHZ  
    PLZ  
    D
    ns  
    ns  
    ns  
    ns  
    Q
    Q
    Q
    Q
    1
    2
    LE  
    2
    12  
    2
    14  
    OE  
    OE  
    2
    16  
    1
    8
    1
    8
    †
    For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
    7
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    SN74ALS841, SN74AS841A, SN74ALS842  
    10-BIT BUS-INTERFACE D-TYPE LATCHES  
    WITH 3-STATE OUTPUTS  
    SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
    PARAMETER MEASUREMENT INFORMATION  
    SERIES 54ALS/74ALS AND 54AS/74AS DEVICES  
    7 V  
    R
    = R1 = R2  
    V
    CC  
    L
    S1  
    R1  
    R
    L
    Test  
    Point  
    From Output  
    Under Test  
    From Output  
    Under Test  
    Test  
    Point  
    Test  
    Point  
    From Output  
    Under Test  
    C
    C
    L
    R
    L
    R2  
    L
    C
    L
    (see Note A)  
    (see Note A)  
    (see Note A)  
    LOAD CIRCUIT FOR  
    BI-STATE  
    TOTEM-POLE OUTPUTS  
    LOAD CIRCUIT  
    FOR OPEN-COLLECTOR OUTPUTS  
    LOAD CIRCUIT  
    FOR 3-STATE OUTPUTS  
    3.5 V  
    3.5 V  
    Timing  
    Input  
    High-Level  
    1.3 V  
    1.3 V  
    1.3 V  
    Pulse  
    0.3 V  
    0.3 V  
    t
    h
    t
    w
    t
    su  
    3.5 V  
    3.5 V  
    0.3 V  
    Data  
    Input  
    Low-Level  
    1.3 V  
    1.3 V  
    1.3 V  
    1.3 V  
    Pulse  
    0.3 V  
    VOLTAGE WAVEFORMS  
    SETUP AND HOLD TIMES  
    VOLTAGE WAVEFORMS  
    PULSE DURATIONS  
    3.5 V  
    0.3 V  
    Output  
    Control  
    (low-level  
    enabling)  
    1.3 V  
    1.3 V  
    3.5 V  
    t
    PZL  
    Input  
    1.3 V  
    1.3 V  
    t
    PLZ  
    0.3 V  
    PHL  
    3.5 V  
    t
    Waveform 1  
    S1 Closed  
    (see Note B)  
    t
    PLH  
    1.3 V  
    V
    OH  
    In-Phase  
    Output  
    1.3 V  
    1.3 V  
    1.3 V  
    V
    OL  
    0.3 V  
    V
    OL  
    t
    PHZ  
    t
    PLH  
    t
    PZH  
    t
    PHL  
    V
    OH  
    V
    Waveform 2  
    S1 Open  
    (see Note B)  
    OH  
    OL  
    Out-of-Phase  
    Output  
    (see Note C)  
    1.3 V  
    1.3 V  
    0.3 V  
    V
    0 V  
    VOLTAGE WAVEFORMS  
    PROPAGATION DELAY TIMES  
    VOLTAGE WAVEFORMS  
    ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS  
    NOTES: A.  
    C includes probe and jig capacitance.  
    L
    B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
    Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
    C. When measuring propagation delay items of 3-state outputs, switch S1 is open.  
    D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.  
    r
    f
    E. The outputs are measured one at a time with one transition per measurement.  
    Figure 1. Load Circuits and Voltage Waveforms  
    8
    POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
    IMPORTANT NOTICE  
    Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
    any product or service without notice, and advise customers to obtain the latest version of relevant information  
    to verify, before placing orders, that information being relied on is current and complete. All products are sold  
    subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
    pertaining to warranty, patent infringement, and limitation of liability.  
    TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
    accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
    TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
    performed, except those mandated by government requirements.  
    CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
    DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
    APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
    WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
    CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
    BE FULLY AT THE CUSTOMER’S RISK.  
    In order to minimize risks associated with the customer’s applications, adequate design and operating  
    safeguards must be provided by the customer to minimize inherent or procedural hazards.  
    TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
    that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
    intellectual property right of TI covering or relating to any combination, machine, or process in which such  
    semiconductor products or services might be or are used. TI’s publication of information regarding any third  
    party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
    Copyright 1998, Texas Instruments Incorporated  
    配单直通车
    74AS842DW产品参数
    型号:74AS842DW
    生命周期：Contact Manufacturer
    IHS 制造商：ROCHESTER ELECTRONICS LLC
    包装说明：,
    Reach Compliance Code：unknown
    风险等级：5.79
    Is Samacsys：N
    逻辑集成电路类型：BUS DRIVER
    Base Number Matches：1
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