74HC08D现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号74HC08D的概述

芯片74HC08D的概述 74HC08D是一款高性能的四个2输入与门（AND gate）集成电路，属于74系列逻辑芯片中的HC（High-Speed CMOS）系列，广泛应用于各种数字电路设计中。该芯片以其出色的速度和功耗特性，使其在当今高速数字电路的设计中得到了广泛的应用。74HC08D的输入和输出兼容多种逻辑电平，适应性较强，适合多种硬件环境，如嵌入式系统、计算机及其外设、通信系统等。芯片74HC08D的详细参数 - 工作电压（V_CC）: 2V 至 6V - 工作温度范围: -40°C 至 +125°C - 输入高电平阈值（V_IH）: 0.7 × V_CC（通常情况下） - 输入低电平阈值（V_IL）: 0.3 × V_CC（通常情况下） - 输出高电平（V_OH）: V_CC - 0.2V（输出电流为-4mA时） - 输出低电平（V_OL）: 0.2V（输出电流为+4mA时...

产品型号74HC08D的Datasheet PDF文件预览

INTEGRATED CIRCUITS

DATA SHEET

74HC08; 74HCT08

Quad 2-input AND gate

Product speciﬁcation

2003 Jul 25

Supersedes data of 1990 Dec 01

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

FEATURES

DESCRIPTION

• Complies with JEDEC standard no. 8-1A

The 74HC/HCT08 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A. The 74HC/HCT08 provide the 2-input

AND function.

• ESD protection:

HBM EIA/JESD22-A114-A exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V.

• Specified from −40 to +85 °C and −40 to +125 °C.

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns.

TYPICAL

SYMBOL

PARAMETER

CONDITIONS

UNIT

74HC08

74HCT08

t_PHL/t_PLHpropagation delay nA, nB to nY

C_L= 15 pF; V_CC= 5 V

C_I

input capacitance

power dissipation capacitance per gate notes 1 and 2

3.5

C_PD

Notes

1. C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + Σ(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = total load switching outputs;

Σ(C_L× V_CC²× f_o) = sum of the outputs.

2. For 74HC08: the condition is V_I= GND to V_CC

For 74HCT08: the condition is V_I= GND to V_CC− 1.5 V.

FUNCTION TABLE

INPUT

OUTPUT

Note

1. H = HIGH voltage level;

L = LOW voltage level.

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

TEMPERATURE RANGE

PINS

PACKAGE

MATERIAL

CODE

74HC08N

−40 to +125 °C

DIP14

plastic

SOT27-1

74HCT08N

74HC08D

SO14

SOT108-1

SOT337-1

SOT402-1

SOT762-1

74HCT08D

74HC08DB

74HCT08DB

74HC08PW

74HCT08PW

74HC08BQ

74HCT08BQ

SO14

SSOP14

TSSOP14

DHVQFN14

PINNING

SYMBOL

DESCRIPTION

data input

GND

V_CC

data input

data output

data input

data output

ground (0 V)

data output

data input

data output

data input

supply voltage

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

handbook, halfpage

13 4B

12 4A

(1)

11 4Y

10 3B

GND

MNA220

GND 3Y

Top view

MCE183

(1) The die substrate is attached to this pad using conductive die

attach material. It can not be used as a supply pin or input.

Fig.1 Pin configuration DIP14, SO14 and

(T)SSOP14.

Fig.2 Pin configuration DHVQFN14.

handbook, halfpage

4Y 11

MNA222

MNA223

Fig.3 Logic symbol.

Fig.4 IEC logic symbol.

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

handbook, halfpage

MNB037

MNA221

Fig.5 HC logic diagram (one gate).

Fig.6 HCT logic diagram (one gate).

RECOMMENDED OPERATING CONDITIONS

74HC08

74HCT08

SYMBOL

PARAMETER

CONDITIONS

UNIT

MIN.

2.0

TYP. MAX. MIN. TYP. MAX.

V_CC

V_I

supply voltage

input voltage

output voltage

5.0

−

6.0

4.5

5.0

−

5.5

V_CC

V_O

−

T_amb

ambient

temperature

see DC and AC

characteristics per device

−40

+25

+125 −40

+25

+125 °C

t_r, t_f

input rise and fall V_CC= 2.0 V

−

1000

500

−

times

V_CC= 4.5 V

6.0

−

6.0

−

500

−

V_CC= 6.0 V

400

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

supply voltage

CONDITIONS

MIN.

−0.5

MAX.

+7.0

UNIT

V_CC

I_IK

input diode current

V_I< −0.5 V or V_I> V_CC+ 0.5 V

V_O< −0.5 V or V_O> V_CC+ 0.5 V

−0.5 V < V_O< V_CC+ 0.5 V

−

±20

±25

±50

+150

°C

I_OK

I_O

output diode current

−

output source or sink current

−

_CC, I_GNDV_CCor GND current

−

T_stg

P_tot

storage temperature

power dissipation

DIP14 package

−65

_amb= −40 to +125 °C; note 1

_amb= −40 to +125 °C; note 2

−

750

500

other packages

Notes

1. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.

2. For SO14 packages: above 70 °C derate linearly with 8 mW/K.

For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.

For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

DC CHARACTERISTICS

Family 74HC08

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

OTHER

V_CC(V)

T_amb= 25 °C

V_IH

HIGH-level input voltage

LOW-level input voltage

2.0

1.5

1.2

−

4.5

6.0

2.0

4.5

6.0

3.15

4.2

−

2.4

3.2

0.8

2.1

2.8

V_IL

0.5

−

1.35

1.8

−

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −20 µA

I_O= −4.0 mA

I_O= −20 µA

I_O= −5.2 mA

2.0

4.5

6.0

1.9

2.0

−

4.4

4.5

3.98

5.9

4.32

6.0

5.48

5.81

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 20 µA

2.0

4.5

6.0

−

0.1

I_O= 20 µA

0.1

I_O= 4.0 mA

I_O= 20 µA

0.15

0.26

0.1

I_O= 5.2 mA

V_I= V_CCor GND

0.16

0.1

−

0.26

±.0.1

±.0.5

I_LI

input leakage current

µA

I_OZ

3-state output OFF current V_I= V_IHor V_IL;

V_O= V_CCor GND

I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0 6.0

−

µA

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

TEST CONDITIONS

OTHER

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

V_CC(V)

T_amb= −40 to +85 °C

V_IHHIGH-level input voltage

2.0

4.5

6.0

2.0

4.5

6.0

1.5

−

3.15

4.2

−

V_IL

LOW-level input voltage

0.5

−

1.35

1.8

−

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −20 µA

I_O= −4.0 mA

I_O= −20 µA

I_O= −5.2 mA

2.0

4.5

6.0

1.9

−

4.4

3.84

5.9

5.34

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 20 µA

2.0

4.5

6.0

−

0.1

I_O= 20 µA

0.1

I_O= 4.0 mA

I_O= 20 µA

0.33

0.1

I_O= 5.2 mA

V_I= V_CCor GND

0.33

±1.0

±.5.0

I_LI

input leakage current

µA

I_OZ

3-state output OFF current V_I= V_IHor V_IL;

V_O= V_CCor GND

I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0 6.0

−

µA

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

TEST CONDITIONS

OTHER

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

V_CC(V)

T_amb= −40 to +125 °C

V_IHHIGH-level input voltage

2.0

4.5

6.0

2.0

4.5

6.0

1.5

−

3.15

4.2

−

V_IL

LOW-level input voltage

0.5

−

1.35

1.8

−

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −20 µA

I_O= −4.0 mA

I_O= −20 µA

I_O= −5.2 mA

2.0

4.5

6.0

1.9

4.4

3.7

5.9

5.2

−

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 20 µA

2.0

4.5

6.0

−

0.1

I_O= 20 µA

0.1

I_O= 4.0 mA

I_O= 20 µA

0.4

0.1

I_O= 5.2 mA

V_I= V_CCor GND

0.4

I_LI

input leakage current

±1.0

±10.0

µA

I_OZ

3-state output OFF current V_I= V_IHor V_IL;

V_O= V_CCor GND

I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0 6.0

−

µA

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

Family 74HCT08

At recommended operating conditions; voltages are referenced to GND (ground = 0).

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX. UNIT

OTHER

V_CC(V)

T_amb= 25 °C

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

HIGH-level output voltage

4.5 to 5.5 2.0

1.6

−

4.5 to 5.5

−

1.2

0.8

V_OH

V_I= V_IHor V_IL

I_O= −20 µA

4.5

4.4

4.5

−

I_O= −4.0 mA

V_I= V_IHor V_IL

I_O= 20 µA

3.84

4.32

V_OL

LOW-level output voltage

4.5

5.5

−

0.1

I_O= 4.0 mA

0.15

−

0.26

±0.1

±0.5

I_LI

input leakage current

V_I= V_CCor GND

µA

I_OZ

3-state output OFF current

V_I= V_IHor V_IL;

V_O= V_CCor GND;

I_O= 0

−

I_CC

quiescent supply current

V_I= V_CCor GND; 5.5

I_O= 0

−

µA

∆I_CC

additional supply current per input V_I= V_CC− 2.1 V;

4.5 to 5.5

216

I_O= 0

T_amb= −40 to +85 °C

V_IH

V_IL

HIGH-level input voltage

4.5 to 5.5 2.0

−

LOW-level input voltage

HIGH-level output voltage

4.5 to 5.5

−

0.8

V_OH

V_I= V_IHor V_IL

I_O= −20 µA

4.5

4.4

−

I_O= −4.0 mA

V_I= V_IHor V_IL

I_O= 20 µA

3.84

V_OL

LOW-level output voltage

4.5

5.5

−

0.1

I_O= 4.0 mA

0.33

±1.0

±5.0

I_LI

input leakage current

V_I= V_CCor GND

µA

I_OZ

3-state output OFF current

V_I= V_IHor V_IL;

V_O= V_CCor GND;

I_O= 0

I_CC

quiescent supply current

V_I= V_CCor GND; 5.5

I_O= 0

−

µA

∆I_CC

additional supply current per input V_I= V_CC− 2.1 V;

4.5 to 5.5

270

I_O= 0

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX. UNIT

OTHER

V_CC(V)

T_amb= −40 to +125 °C

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

HIGH-level output voltage

4.5 to 5.5 2.0

−

4.5 to 5.5

−

0.8

V_OH

V_I= V_IHor V_IL

I_O= −20 µA

4.5

4.4

3.7

−

I_O= −4.0 mA

V_I= V_IHor V_IL

I_O= 20 µA

V_OL

LOW-level output voltage

4.5

5.5

−

0.1

I_O= 4.0 mA

0.4

I_LI

input leakage current

V_I= V_CCor GND

±1.0

±10

µA

I_OZ

3-state output OFF current

V_I= V_IHor V_IL;

V_O= V_CCor GND;

I_O= 0

I_CC

quiescent supply current

V_I= V_CCor GND; 5.5

I_O= 0

−

µA

∆I_CC

additional supply current per input V_I= V_CC− 2.1 V;

4.5 to 5.5

294

I_O= 0

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

AC CHARACTERISTICS

Family 74HC08

GND = 0 V; t_f= t_f= 6 ns; C_L= 50 pF.

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

V_CC(V)

T_amb= 25 °C

t_PHL/t_PLH

propagation delay nA,

nB to nY

see Figs 7 and 8 2.0

−

4.5

6.0

t_THL/t_TLH

output transition time

see Figs 7 and 8 2.0

4.5

6.0

T_amb= −40 to +85 °C

t_PHL/t_PLH

propagation delay nA,

nB to nY

see Figs 7 and 8 2.0

−

115

4.5

6.0

t_THL/t_TLH

output transition time

see Figs 7 and 8 2.0

4.5

6.0

T_amb= −40 to +125 °C

t_PHL/t_PLH

propagation delay nA,

nB to nY

see Figs 7 and 8 2.0

−

135

4.5

6.0

t_THL/t_TLH

output transition time

see Figs 7 and 8 2.0

110

4.5

6.0

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

Family 74HCT08

GND = 0 V; t_f= t_f= 6 ns; C_L= 50 pF.

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

V_CC(V)

T_amb= 25 °C

t_PHL/t_PLH

propagation delay nA,

nB to nY

see Figs 7 and 8 4.5

−

t_THL/t_TLH

output transition time

T_amb= −40 to +85 °C

t_PHL/t_PLHpropagation delay nA,

see Figs 7 and 8 4.5

−

nB to nY

t_THL/t_TLH

output transition time

T_amb= −40 to +125 °C

t_PHL/t_PLHpropagation delay nA,

see Figs 7 and 8 4.5

−

nB to nY

t_THL/t_TLH

output transition time

AC WAVEFORMS

handbook, halfpage

nA, nB input

GND

PHL

PLH

90%

nY output

10%

TLH

MNA726

THL

74HC08: V_M= 50%; V_I= GND to V_CC

74HCT08: V_M= 1.3 V; V_I= GND to 3 V.

Fig.7 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

handbook, halfpage

PULSE

GENERATOR

D.U.T

50 pF

MGK565

Definitions for test circuit:

C_L= Load capacitance including jig and probe capacitance.

R_T= Termination resistance should be equal to the output impedance Z_oof the pulse generator.

Fig.8 Load circuitry for switching times.

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

PACKAGE OUTLINES

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

w M

(e )

pin 1 index

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

min.

max.

1.73

1.13

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05

8.25

7.80

10.0

8.3

4.2

0.51

3.2

2.54

0.1

7.62

0.3

0.254

0.01

2.2

0.068

0.044

0.021

0.015

0.014

0.009

0.77

0.73

0.26

0.24

0.14

0.12

0.32

0.31

0.39

0.33

inches

0.17

0.02

0.13

0.087

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-13

SOT27-1

050G04

MO-001

SC-501-14

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

(A )

pin 1 index

detail X

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

1.75

1.27

0.05

1.05

0.25

0.01

0.25

0.1

0.25

0.01

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.35

0.014 0.0075 0.34

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches

0.041

0.01 0.004

0.069

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT108-1

076E06

MS-012

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

(A )

pin 1 index

detail X

w M

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

max.

8^o

0^o

0.21

0.05

1.80

1.65

0.38

0.25

0.20

0.09

6.4

6.0

5.4

5.2

7.9

7.6

1.03

0.63

0.9

0.7

1.4

0.9

0.25

0.65

1.25

0.2

0.13

0.1

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT337-1

MO-150

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

(A )

pin 1 index

detail X

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

(2)

(1)

UNIT

max.

8^o

0^o

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

6.6

6.2

0.75

0.50

0.4

0.3

0.72

0.38

1.1

0.65

0.25

0.2

0.13

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-18

SOT402-1

MO-153

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 x 3 x 0.85 mm

SOT762-1

detail X

terminal 1

index area

terminal 1

index area

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

max.

0.05 0.30

0.00 0.18

3.1

2.9

1.65

1.35

2.6

2.4

1.15

0.85

0.5

0.3

0.05

0.1

0.2

0.5

0.1

0.05

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

02-10-17

03-01-27

SOT762-1

- - -

MO-241

- - -

2003 Jul 25

Philips Semiconductors

Product speciﬁcation

Quad 2-input AND gate

74HC08; 74HCT08

DATA SHEET STATUS

DATA SHEET

STATUS⁽¹⁾

PRODUCT

STATUS⁽²⁾⁽³⁾

LEVEL

DEFINITION

Objective data

Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

Preliminary data Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS

DISCLAIMERS

Short-form specification

The data in a short-form

Life support applications

These products are not

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Right to make changes

Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

Application information

Applications that are

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

products, conveys no licence or title under any patent,

makes no representations or warranties that these

products are free from patent, copyright, or mask work

right infringement, unless otherwise specified.

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

2003 Jul 25

Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales ofﬁces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

SCA75

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

613508/03/pp20

Date of release: 2003 Jul 25

Document order number: 9397 750 11265

74HC08D相关文章

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74HC08D产品参数

型号:	74HC08D
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	NXP SEMICONDUCTORS
零件包装代码：	SOIC
包装说明：	3.90 MM, PLASTIC, MO-012, SOT-108-1, SO-14
针数：	14
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.03
Is Samacsys：	N
系列：	HC/UH
JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e4
长度：	8.65 mm
负载电容（CL）：	50 pF
逻辑集成电路类型：	AND GATE
最大I（ol）：	0.004 A
湿度敏感等级：	1
功能数量：	4
输入次数：	2
端子数量：	14
最高工作温度：	125 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP14,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
包装方法：	TUBE
峰值回流温度（摄氏度）：	260
电源：	2/6 V
Prop。Delay @ Nom-Sup：	27 ns
传播延迟（tpd）：	135 ns
认证状态：	Not Qualified
施密特触发器：	NO
座面最大高度：	1.75 mm
子类别：	Gates
最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	AUTOMOTIVE
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm
Base Number Matches：	1

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